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DIX4192: AES input and output "Transformer-less" design

Part Number: DIX4192

Tool/software:

Hi Sir,

I am using the TI DIX4192 Digital Audio Interface Transceiver IC for I2S to AES input and output. To simplify the design and reduce costs, I have implemented a "Transformer-less" design. The relevant circuit schematics are provided below.

I would like to inquire about the feasibility of the following AES "Transformer-less" input and output circuit design. Are there any recommendations or potential issues with this approach? Furthermore, given that this "Transformer-less" design does not utilize a transformer, is it necessary to add additional ESD diodes for protection?

Thank you a lot.

  • Hello Tony, 

    The ratio of these transformer used on the EVM is 1:1 so the transformer coupling is mainly used  to provide isolation as well as  to improve common-mode noise rejection.  I would recommend to use them for the above reasons. However, if you want to go with transformer-less approach, it is okay too and you can refer to 10.1.2  Receiver Input Interfacing In specific, refer to Figure 73.and 78  for more information.

    In almost all ICs that I have worked with, there is always some sort of ESD projection  for various pins so I would say it is not required to add additional ESD protection.

    Regards,

    Arash

  • Hello Arash,

    Thank you for the quick response. I've looked at Figures 73 and 78 of the DIX4192 datasheet, but those seem to only cover unbalanced (single-ended) input/output design. I haven't found any design recommendations for balanced (differential signal) input/output in the datasheet. Could you provide some guidance on "Transformer-less" balanced input/output design for this chip?

    Thanks,
    Tony

  • Hi Tony,

    I don't see any problem with your configuration if you go with transformer-less approach.

    Regards,

    Arash

  • Hi Arash,

    Thank you a lot

    BR

    Tony