TLV320ADC5140：Currently we want to use this ADC to capture audio, but we can't output the sound

What should I do now? Please help me, thank you very much.

Hi,

Couple of things:

1) Please refer to application section in datasheet for recommended device decoupling.

2) Please confirm whether in the STM controller, I2S is operating in full-duplex or simplex mode, and which of the I2S_SD and I2Sext_SD is configured as transmitter/receiver.

Thanks and Regards,

Lakshmi Narasimhan

1. We replaced the capacitors around the device, but those three registers still read FF,0,C0.
2.I2S is working in half duplex mode, ADC5140 sends data, STM32 receives data, current configuration is STM32 configured as master, ADC5140 as slave.

Is there another solution?Thanks and Regards.

Hi,

(1) I am assuming that the ASI_STS register is reading 0xFF while the STM master is active? If so, the register reading back 0xFF is indicating that the ADC is not receiving a valid BCLK and FSYNC. I am seeing that the IOVDD is 3.3V to the ADC, can you confirm that the SCK, WS signals from STM to the ADC are also at the 3.3V IO level?

Thanks and Regards,

Lakshmi Narasimhan

Hi, I can confirm that these signals are 3.3V levels. I have now tweaked the rest of the program a bit and also reworked the registers. The three registers of the ADC now show the contents at runtime:
ASI_STS Register content: 42
DEV_STS0 Register: f0
DEV_STS1 Register: e0.
The configuration of the registers after my modification is as follows, please help me to see if there is any error?

I am only using channel 3 to receive data from the microphone.

adc_write_reg(ADCX140_PAGE_SELECT,0x00);

adc_write_reg(ADCX140_SW_RESET,0x00);
adc_write_reg(ADCX140_SLEEP_CFG,0x81);
adc_write_reg(ADCX140_SHDN_CFG,0x08);
adc_write_reg(ADCX140_ASI_CFG0,0x40);
adc_write_reg(ADCX140_ASI_CFG1,0x00);
adc_write_reg(ADCX140_ASI_CFG2,0x00);
	
adc_write_reg(ADCX140_MST_CFG0,0x02);
adc_write_reg(ADCX140_MST_CFG1,0x40);
		
adc_write_reg(ADCX140_CLK_SRC,0x10);

adc_write_reg(ADCX140_INT_CFG,0x00);

adc_write_reg(ADCX140_BIAS_CFG,0x00);
		
adc_write_reg(ADCX140_CH1_CFG0,0x20);
adc_write_reg(ADCX140_CH1_CFG1,0x00);
adc_write_reg(ADCX140_CH1_CFG2,0xc9);
adc_write_reg(ADCX140_CH1_CFG3,0x80);
adc_write_reg(ADCX140_CH1_CFG4,0x00);
		
adc_write_reg(ADCX140_CH2_CFG0,0x20);
adc_write_reg(ADCX140_CH2_CFG1,0x00);
adc_write_reg(ADCX140_CH2_CFG2,0xc9);
adc_write_reg(ADCX140_CH2_CFG3,0x80);
adc_write_reg(ADCX140_CH2_CFG4,0x00);
		
adc_write_reg(ADCX140_CH3_CFG0,0x60);
adc_write_reg(ADCX140_CH3_CFG1,0x00);
adc_write_reg(ADCX140_CH3_CFG2,0xc9);
adc_write_reg(ADCX140_CH3_CFG3,0x80);
adc_write_reg(ADCX140_CH3_CFG4,0x00);
adc_write_reg(ADCX140_CH4_CFG0,0x60);
adc_write_reg(ADCX140_CH4_CFG1,0x00);
adc_write_reg(ADCX140_CH4_CFG2,0xc9);
adc_write_reg(ADCX140_CH4_CFG3,0x80);
adc_write_reg(ADCX140_CH4_CFG4,0x00);
		
adc_write_reg(ADCX140_DSP_CFG0,0x01);
adc_write_reg(ADCX140_DSP_CFG1,0x40);
adc_write_reg(ADCX140_DRE_CFG0,0x7b);
adc_write_reg(ADCX140_AGC_CFG0,0xe7);
adc_write_reg(ADCX140_IN_CH_EN,0xf0);
adc_write_reg(ADCX140_ASI_OUT_CH_EN,0x20);
adc_write_reg(ADCX140_PWR_CFG,0x40);

I'm sorry. I misread that SCK and WS are working at 1.6V, is there something wrong?Thanks and Regards.

Hi,

Sorry for the confusion, so the SCK and WS are working at 1.6V instead of 3.3V? Because the IOVDD is 3.3V, and the digital inputs need to be per the VIH/VIL specifications on the datasheet.

Additionally, since device is in I2S, and Channel 3 is being used for sending data, we can do the following:

Configure ASI_CH3 register to give CH3 data on left/right slot 0.

Thanks and Regards,

Lakshmi Narasimhan

What should I set the voltage of SCK and WS to? How was this set up?

I have another question, does IN2P_GPI2 correspond to channel 2? Similarly, does IN12P_GPI1 correspond to channel 1?, Does IN3P_GPI3 correspond to channel 3?, Does IN4P_GPI4 correspond to channel 4?I'm using an analog single-ended input.But now the SDOUT pin output is always 0.Thanks and Regards.

Hi Ye,

Yes your clocks should be set to 3.3V. This is because the logic thresholds are proportional to IOVDD according to the table that Lakshmi shared. Your IOVDD is 3.3V so your clocks must follow.

Yes the first digit in the pin name corresponds to the channel name as you described.

You may not be getting any output because your clock voltage is incorrect. Please fix the clock level and see if there's any change.

Best regards,
Jeff McPherson

Hi Jeff, how should I modify this clock level? Is it necessary to rework the board? Is it possible to get the correct voltage by adding a pull-up resistor on the pins SCK and WS?We currently do not have any resistors connected to these two pins.Thanks and Regards.

Hi Ye,

You would need to check if the STM controller used for the I2S communication is capable of providing I2S signals with 3.3V IO logic, and it would be specific to the microcontroller configurations.

If it is not, then we may need to either:

1) Use a level translator to translate the IO levels to 3.3V, or

2) Use 1.8V as the IOVDD for the ADC (if the I2S signals from the controller are of 1.8V IO)

Thanks and Regards,

Lakshmi Narasimhan