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TLV320AIC3204: Power Supply Sequencing

Metehan Demirel
Prodigy 20 points
Part Number: TLV320AIC3204

Tool/software:

Hello, I want to implement TLV320AIC3204 to my new PCB project. I was inspecting the related documents about the IC and I seem to have a found a few contradictions.

1.The datasheet of TLV320AIC3204 (Page 8 Section 7.3 Recommended Operating Conditions) specifies that minimum LDOIN/HPVDD supply is 1.9V. But the document "SLAA557 (TLV320AIC3204 Application Reference Guide)" Page 1 Register 10 Bit 0 says the following,

0: When Page-1, Reg-10, D1=1, then LDOIN input range is 1.5V to 1.95V
1: When Page-1, Reg-10, D1=1, then LDOIN input range is 1.8V to 3.6V

(This is at page 125 of the document)

and the default value of this register is 0 there this implies that during start-up LDOIN should powered up with a maximum voltage 1.95V and LDOIN supply's minimum supply voltage is actually 1.5V.

and also the document "SLAA492A (TLV320AIC32x4 Power Supply Sequencing)" says the following (at Page 2  Section 2 External DVDD and AVDD Power Supply Sequence)

The recommended power sequence for this configuration is to provide all supplies simultaneously. A
typical configuration in such a case is to use a single 1.8-V supply for IOVDD, DVDD, LDOin, and AVDD

So this again implies that LDOIN can be powered with voltage lower than 1.9V.

My question is, I am planning to supply the LDOIN and IOVDD from the same 3.3V LDO at start-up, would this cause any issues? What is the real voltage for LDOIN supply?

Also I noticed that by default AVDD is tied to DVDD with a 10Kohm resistor this allows AVDD to ramp up when DVDD is provided. The Figure-1  at the document "SLAA492A" shows that DVDD is connected to LDOIN/HPVDD so if I enable the DVDD by pulling the LDO_SELECT pin of the TLV320AIC3204 DVDD get immediately turned on when I apply the LDOIN supply ?

If it does, does the DVDD get's set to it's default set voltage (which is controlled by Page 1 Register 2 Bits 6-7 = 00 is the default value which corresponds to 1.72V).



  • 0
    TI__Mastermind 46835 points

    Hi Metehan,

    Since Page 1 Register 10 Bit 1 is default 0, Bit 0 is not in effect on startup. That's probably where the recommended operating condition came from. Once Bit 1 is set to 1, the limits in the register map according to Bit 0 overrule.

    I agree that 1.5V is the practical minimum however. This is stated in the power supply section of the reference guide.

    You can supply LDOIN and IOVDD with 3.3V. AVDD and DVDD will get generated from the LDO.

    At start up, DVDD will get generated from the LDO (supplied by LDOIN) and weakly coupled to AVDD. Yes this will be the default value of 1.72V. Once you enable the analog LDO, you must remove the weak coupling.

    Best regards,
    Jeff McPherson

  • 0 in reply to Jeff McPherson
    Prodigy 20 points

    Hello, thank you for your answer. 

    So I can supply the LDOIN 3.3V initially, yes?

    In order for the register bits to take effect do I need to do a hardware reset of the IC from the RESET pin?, right?

    Both internal Digital LDO and internal analog LDO is shown to be tied to LDOIN, and by default P1_R2_D0, which controls enabling the AVDD is 0. So by default AVDD is not enabled. So it doesn't get charged up from the LDOIN pin but gets charged from the Digital LDO if I tie the LDO_SELECT pin to IOVDD?

    And it is recommended that IOVDD is always supplied first. And since I am supplying IOVDD and LDOIN from the same LDOIN they are going to be supplied at the same time, would this cause any issues ? Or should I use a power sequencer to supply the IOVDD first?

    I didn't know I had to remove the weak coupling after ALDO is enabled, thanks for highlighting that.

  • +1 in reply to Metehan Demirel
    TI__Mastermind 46835 points

    Hi Metehan,

    Yes, LDOIN can be 3.3V

    As part of the reset sequence, the device should be held in reset until all power supplies are stable. Once they are the reset can be released and the registers will be their default values and accessible.

    You are correct that AVDD gets charged from the Digital LDO (DVDD) by default.

    The recommended minimum between LDO and IOVDD is 0 seconds, so they can be tied together and come up together with no issues.

    Best regards,
    Jeff McPherson

  • 0 in reply to Jeff McPherson
    Prodigy 20 points

    I guess another typo there. The graph shows tI-L but table says tI-D. Thanks