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TAC5112: MCLK not applicable to auto setting

Ryu Yamashita
Genius 3600 points
Part Number: TAC5112

Tool/software:

Hi team,

I would like to set 22.5792MHz as MCLK and Fs at 44.1k.
I think this corresponds to the custom mode in the following page, but I could not figure out how to set the register settings in this case.

https://www.ti.com/lit/an/slaaeg6a/slaaeg6a.pdf


Is there a document that summarizes these?
Or could you please tell me the register settings in this case?

Best Regards,
Ryu.

  • 0
    TI__Genius 12295 points

    Hi Ryu,

    Just to make sure, are you trying to use the device in controller mode, where you use the MCLK as your only input clock and BCLK and WCLK are output? I can help you generate a script to do this. I am working on the document, unfortunately it is not released yet. It will hopefully be in a few months. Is this related to your other question here on the forum? I am working on a solution that uses this MCLK in controller mode but having a little issue making sure the dividers do what I want. This should be resolved in the next few days. Let me know if this is the config you want.

    Best,
    Mir

  • 0 in reply to Mir Jeffres
    Genius 3600 points

    Hi Mir,

    As you are aware.
    I plan to input only CCLK in controller mode.
    Also the same evaluation as other threads I have posted.

    Best Regards,
    Ryu.

  • +1 in reply to Ryu Yamashita
    TI__Genius 12295 points

    Hi, sounds good. I will close this thread for now and keep the other one open. It is going to take me a few days to figure out how to set the dividers to be how we want here via I2C, waiting on response from the design team.

    Best,
    Mir