We use DIX4192 for input and output of AES audio. We would like to know which registers must be configured to send and receive audio data normally. Thank you.
Hi, Here are few recommendation regarding the schematics.
I would add dedicated decoupling caps to each individual supply lines close to the pins
Reset is (active low), I prefer to have a PU on it
I believe you still need to provide RCLKI to get it to work ( simplest way is to tab MCLK)
You can refer the two figures below to visually see the path you want and thus the bits that you need to program to send the signal form your input to Tx out. For example how to mux the correct input to the AES decoder . Refer to datasheet for in-depth explanation of DIR and DIT operation.
make sure the related bits for AES operation on both DIR and DIT is set correctly , such as Register 08:
you can also use flag registers ( such as Register 14) to see if there is any error or UNLOCK detection so you can correct it .
Below is a sample script, based on your needs you can add or modify the registers.
*******************Sample script********************
# set interface mode to i2c fast
i i2cfast
# set register page to 0
w e0 7f 00
# set gpo 1 thru 4 to logic 1
w e0 1b 01
w e0 1c 01
w e0 1d 01
w e0 1e 01
# dir setup
w e0 0d 00
w e0 0e 09
w e0 0f 22
w e0 10 00
w e0 11 00
# dit setup
w e0 07 f4
w e0 08 00
w e0 09 06
# power up
w e0 01 26
*******************Sample script********************
Regards,
Arash
