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TPA6304-Q1: About fault detection issue

Jingkun Wang
Intellectual 295 points
Part Number: TPA6304-Q1


Tool/software:

Hello TI Team,

Now we did below operations:

4CH connected normally --> Power up --> Normally run --> one of channels short to GND/Battery --> nFault pin changed from high to low

--> Read registers : 0x0A-0x32 --> nFault pin kept low after reading registers and the fault released

Q1: The registers were same when the channel short to GND and short to Battery. Why?

Q2: Why did the nFault pin keep low after reading back and the fault released?

Best Regards!

Wang Jingkun

  • 0
    TI__Genius 11070 points

    JingKun,

    Short to power and short to GND will trigger same OC shutdown, so register point of view they are same. this is expected behaivor.

    Jingkun Wang said:

    Q1: The registers were same when the channel short to GND and short to Battery. Why?

    To release fault pin, please write clear fault command at bit 7 of 0x30 register

  • 0 in reply to Dylan Yao
    Intellectual 295 points

    Hello Dylan，

    There is a note in the datasheet.

    "This clears the faults and set channels into Hi-Z mode."

    Does it mean that it must sets channels into Hi-Z mode when or after clearing the faults?

    Or does it auto into Hi-Z mode when clearing the faults?

    Best Regards!

    Wang Jingkun

  • 0 in reply to Jingkun Wang
    TI__Genius 11070 points

    Jingkun,

    Not necessary to set channel into Hiz mode after clear fault.  clear fault and enter Hiz are independent event. 

    Dylan

  • 0 in reply to Jingkun Wang
    TI__Genius 11070 points

    Here the note of  "This clears the faults and set channels into Hi-Z mode.", is just a recommendation of set to Hiz after clear fault.

  • 0 in reply to Dylan Yao
    Intellectual 295 points

    Hi Dylan

    We did below operations:

    ⋅ Normal Run
    ↓
    ⋅ CH4's load open and shorts to battery 
    ↓
    ⋅ Read back:      0X0E[4:2]=101  PSD (protective shutdown)
                              0X0F[4]=1  Channel 4 over current fault event stored
    ↓
    ⋅ Setting bit 7 of 0x30 register: clear fault
    ↓
    ⋅ Read back:      0X0E[4:2]=001  Hi-Z
      At this step, we didn't set CH4 to Hi-Z
    ↓
    ⋅ Fault signal was trigged.
    ↓
    ⋅ Read back:      0X0B[2]=1  Short-to-power detected on channel 4
    ⋅ Read back:      0X0E[4:2]=01  DIAG

    It seems that the channel automatically enters high-impedance mode and DIAG(if the channel's load is abnormal).

    Is it expected behavior?

    Best Regards!

    Wang Jingkun

  • +1 in reply to Jingkun Wang
    TI__Guru 51460 points

    HI Jingkun

    Jingkun Wang said:
    It seems that the channel automatically enters high-impedance mode and DIAG(if the channel's load is abnormal).

    Yes, when this device try to enter PLAY mode, will auto run DC load diag to check the load condition.