TAS5756M: Overdriven output after switching the I2S input signal source

Hi Martin, 

Let me understand the issue better. 

A scaler board has an I2S and SPDIF input and based on the audio level it will choose one and provide the I2S to the TAS5756M device, correct? 

Is the issue seen when switching from I2S to SPDIF, SPDIF to I2S, or both? Is the issue not seen on the tweeters? 

Regards,
Sydney Northcutt 

Hi Sydney,

Yes, the issue is seen when I switch in both directions and I think also on the left/right speaker.

Today I did some measurements on the audio amplifier. If the subwoofer will overdriven, the DAC output has almost rectangualr shape.

The only solution is to power cycle the audio amplifier. Switch between the I2S and SPDIF input signals doesn't solve the problem.

BR

martin sauer

Hi Martin, 

With the DGSW01, is the clocking kept consistent and only the I2S data is changed when you swap between inputs or are the clocks altered as well? Can you monitor if there is any issues or dead spots within the audio clocks to TAS5756?

Regards,
Sydney Northcutt

Hi Sydney,

we have the following parameters:

 int. CPU (I2S):

• Master-Clk: 24,5MHz
• Bit-Clk: 3,05MHz
• FS-Clk: 48kHz
• Bit: 26-Bit

 Ext. HDMI (SPDIF):

• Master-Clk: 12,3MHz
• Bit-Clk: 3,075MHz
• FS-Clk: 48kHz
• Bit: 16-Bit

Switch from SPDIF to I2S:

• Master-Clk: 12,3MHz -> 49 -> 24,5MHz
• Bit-Clk: 3,05MHz -> 4,5 -> 3,05MHz
• FS-Clk: 48kHz -> 0 -> 49kHz -> 48kHz

Master Clock will jump from 12,3MHz to 49MHz and back to 24,5MHz. Bit-Clk changes from 3,05MHz to 4,5MHz to 3,05MHz. FS Clk will switch from 48kHz to 0 to 48kHz

Switch from I2S to SPDIF:

• Master-Cl: 24,5MHz -> 17 -> 19 –> 12,3MHz
• Bit-Clk: 3,05MHz -> 4/3 -> 3,05MHz
• FS-Clk: 48kHz -> 70 -> 0 -> 48kHz

Master-Clk will move around 17-19MHz during switch time, than will be stable at 12,3MHz. Bit-Clk will move around 4MHz during switch time, than will be stable at 3,05MHz. FS-Clk will move around 70kHz during switch time, than will be stable at 48kHz.

I can measure that the voltage at pin SPK_GAIN / FREQ will change from 5.43V to 4.8V and back during the switching time. The resistor values ar 750k and 150k.

If the subwoofer amplifier will overdrivven the fault signal is low.

BR

Martin

Hi Martin, 

Does the amplifier work correctly on start up with either the SPDIF signal or the I2S signal and the issue only presents itself when you switch between the two? 

Are you changing the word length on the amplifier side when swapping between the two? This could be the reason for the data to be interpreted as larger than it is. The default setting is I2S and 24 bit word length. More details can be found in section 9.3.6 Serial Audio Port - Data Formats and Bit Depths in the datasheet. 

Another possible issue could be due to the bit clock change which is used to create clocks for the DSP and DAC. 

Regards,
Sydney Northcutt 

Hi Martin,

Yes, the bit clock is used to create clocks for the DSP and DAC so any change could cause certainly issues. Glad to hear the issue is resolved with this fix. Let us know if you need any further support.

Regards,
Sydney Northcutt