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TAC5412-Q1: Recommended registers setting

Part Number: TAC5412-Q1

Tool/software:

Hello, 

Our customer is struggling to gat datasheet specification SNR. Could you suggest us your recommended registers setting?

Their configuration is SE 5Vrms input  and  SE external Vcom output at fs 44.1kHz, slave mode MCLK. PLL can be enabled.

We are looking for 112dB ADC and 120dB DAC (-3dB incase of SE mode) range SNR.

Regards,

Mochizuki

  • Hi Mochizuki-san,

    There are some example scripts available at the end of the EVM user's guide that can be used to achieve datasheet performance.

    Best regards,
    Jeff McPherson

  • Hi Jeff,

    Our customer got EVM and ran the ADC and the DAC with example scripts.

    They want to verify analog signal back to back configulation, like 5Vrms SE input ---ADC---I2S ---DAC ---1Vrms SE output at 44.1KHz.

    To realize this signal chine, ADC DOUT should tied to DIN of DAC, also SCLK and BCLK come from USB audio XMOS.

    There is not Jumper pins to connect DOUT to DIN,  should we solder those pins on the EVM?

    Do you have refernce script for this pourpose?

    Regards,

    Mochizuki   

  • Hi,

    You can connect the DOUT and DIN loops on the EVM with your own jumper cable. I tested this with USB audio going through and I was able to read out some data coming back through the device. Let me know if you are having trouble with this.

    Best,
    Mir

  • Hi Mir,

    Thank you for your comment.

    Our customer could see 100dB SNR at SE A-in and SE A-out configulation with simple simple RC post DAC LPF. 

    Regards,

    Mochizuki