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PCM1690: start up white noise

user5883945
Expert 1846 points
Part Number: PCM1690

Tool/software:

Dear,

  Customers using PCM1690 often experience; After changing the following configuration, the probability decreases and only exists at the moment of startup, duration of about 30 seconds;

Change the automatic mode to manual single mode and mute the DAC after enabling asynchronous mode, 

  • 0
    TI__Mastermind 46565 points

    Hi,

    Today is a holiday for our team in the U.S. We will follow up with you on Tuesday, Dallas time.

    Thank you!
    Jeff McPherson

  • 0
    TI__Mastermind 30681 points

    Hello,

    From the post we understand there is an issue at the beginning that  lasts about 30sec and goes away. But we don't have much information about the source of data, clk rates, and etc. Could you provide a clear description about the issue in words and also provide the info about the all the clk rates (BCK, Fsync, SCLK and etc).

    Also for starting the debug  , it would be very helpful if you send a 1KHz sinewave as the input and capture the digital  input and the resulted  output along with the clks so we can have a better understanding of the nature of the problem. 

    Kind regards,

    Arash

  • 0 in reply to Arash Loloee
    Expert 1846 points

    Hi,

      Customer tested the date, show as attachment.

    SCLK.docx

  • 0 in reply to user5883945
    TI__Mastermind 30681 points

    Thanks for screen shots.

    So from the photos I gathered the BCK is 3.072MHz, SCK=12.27MHz and LRCLK=48KHz.

     I went through the  register values the customer has provided  and I didn't see anything  out of ordinary except  register 0x40 has a value of 1100 1001 which indicates it is set to Single rate  SRDA[1:0] =01 but from the values of clks 12.27MHz/48K=256 ==> so it should be dual rate

    I still don't have

    1) the screen shot of the I2s and input and output in ONE single plot,  so I can see when the output is distorted , how the clks and inputs are and when the output is ok, how these signals are relative to each other. When screen shots are sent separately, we can not see the relative positions of edges and other issues that might be. Also since in the registers you set the format to I2S I need to verify  the input  is I2S all the time, 

    2) Description of the problem and how  the two tables that you submitted in your first post changes the situation?

    From the limited information that I gathered, it seems the system as a whole takes a while (30sec) to stabilize itself and that may not be directly the issue of the DAC itself as the registers are very simple and except for 0x40, it seems registers are set correctly.

    Kind Regards,

    Arash