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TAS5624A: What is the recommended bypass caps on pin 2 VDD? Data sheet and EVM seem to differ on this point?

Robert Vesetas
Prodigy 10 points
Part Number: TAS5624A
Other Parts Discussed in Thread: TAS5624

Tool/software:

OPTION 1 This is our current test configuration

slau376a EVM TAS5622-5624 UG

Sch sheet 2 shows pin 2 with only a 100nF cap with series 3R3 resistor from +12V

OPTION 2

TAS5624A
SLAS844A –MAY 2012–REVISED JANUARY 2016

Fig 16 shows pin 2 with 100nF and 100uF bulk decouple on pin 2 with NO series 3R3 to +12V

  1.  We are finding that during startup a FAULT is sometimes raised.
  2. Do you recommended that OPTION 2 be used?
  3. I am concerned that current transients on the 12V rail to pin 2 may cause an under voltage fault. So perhaps no series 3R3 would be better?

Any thoughts suggests are most welcomed as we are trying to get this product into final delivery test on schedule.

Cheers

Robert

.

  • 0
    TI__Mastermind 18240 points

    Hi Robert, 

    Both options are valid configurations of VDD. They are just different methods of filtering the power supply. It is possible that a voltage drop is causing UVP. Just to clarify by FAULT raised you mean triggered, correct? This pin is active low so it is in a low state when it is triggered.

    Can you probe your power supply?

    Also are you using the EVM or a custom board? 

    Regards,
    Sydney Northcutt 

  • 0 in reply to Sydney Northcutt
    Prodigy 10 points

    Hi Sydney,

    Sorry for not replying earlier. Happily we have resolved our issue. Our design did not follow the recommendation of the TAS5624 data sheet in that the PWM signal needs to be stable (no modulation) for a specified period of time after power up. After the design was corrected we have no further issues with start-up.

    In our case we have a custom board and are not using a TI PWM modulator chip to drive the TAS5624, but using our own bespoke design. As in our application we needed over 20 channels, but critically needed to program a different time delay (down to micro second resolution) on each channel of data (eg for a beamformer). Using the TI PWM modulator has the advantage of higher dynamic range than our implementation of a 2nd order delta-sigma modulator. In retrospect a the TI PWM modulator + Amplifier chipset should have been considered more deeply...

    Thank you again for your prompt reply.

    Kind regards

    Robert Vesetas