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TLV320AIC3104: Noise Issue with TI Audio Codec

Pravin P
Prodigy 100 points
Part Number: TLV320AIC3104


Tool/software:

Hi,

I’m using a TI audio codec (P/N – TLV320AIC3104) in my custom design with a ZU9EG MPSoC. I’m configuring the audio codec registers via the I²C interface.

I can enable both the input and output paths and hear audio output from the codec, but there is noticeable noise in the audio output. The noise occurs in the codec loopback itself when I enable the ADC and DAC paths.

I’d like to know whether my register configuration could be causing the noise problem. I’m configuring the following registers at the kernel level:

Enable input path:
i2cset -y -f 0 0x18 17 0x0
i2cset -y -f 0 0x18 18 0x0
i2cset -y -f 0 0x18 19 0x7c
i2cset -y -f 0 0x18 22 0x7c
i2cset -y -f 0 0x18 15 0x0 // PGA volume left ADC
i2cset -y -f 0 0x18 16 0x0 // PGA volume right ADC

Enable output path:
i2cset -y -f 0 0x18 7 0xa
i2cset -y -f 0 0x18 37 0xc0
i2cset -y -f 0 0x18 43 0x0
i2cset -y -f 0 0x18 44 0x0
i2cset -y -f 0 0x18 82 0x80
i2cset -y -f 0 0x18 85 0x80
i2cset -y -f 0 0x18 81 0x80
i2cset -y -f 0 0x18 84 0x80
i2cset -y -f 0 0x18 89 0x80
i2cset -y -f 0 0x18 92 0x80
i2cset -y -f 0 0x18 88 0x80
i2cset -y -f 0 0x18 91 0x80
i2cset -y -f 0 0x18 86 0x09
i2cset -y -f 0 0x18 93 0x09

Is there any issue with this register configuration? Is it possible to reduce the noise by adjusting any filter-related registers?

Thanks,
Pravin

  • 0
    TI__Genius 13565 points

    Hi,

    Can you share your clock config? What are your MCLK, BCLK, and WCLK? And if you can take scope shots of your digital or analog signals that would be helpful as well, to see what the noise looks like. After going through your registers, the main thing I notice is that you routed L and R inputs to each L and R output, as I commented on your code:

    i2cset -y -f 0 0x18 17 0x0 #mic2l and mic2r connected to ladc pga, 0db
i2cset -y -f 0 0x18 18 0x0 #mic2l and mic2r connected to radc pga, 0db
i2cset -y -f 0 0x18 19 0x7c #line1l not connected to ladc pga, ladc powered up
i2cset -y -f 0 0x18 22 0x7c #same for mic1rp/line1rp, radc powered up
i2cset -y -f 0 0x18 15 0x0 // PGA volume left ADC
i2cset -y -f 0 0x18 16 0x0 // PGA volume right ADC

Enable output path:
i2cset -y -f 0 0x18 7 0xa
i2cset -y -f 0 0x18 37 0xc0 #l+r dac powered up
i2cset -y -f 0 0x18 43 0x0 #ldac not muted
i2cset -y -f 0 0x18 44 0x0 #rdac not muted
i2cset -y -f 0 0x18 82 0x80 #dac_l1 routed to left_lop/m
i2cset -y -f 0 0x18 85 0x80 #dac_r1 routed to left_lop/m
i2cset -y -f 0 0x18 81 0x80 #pga_l routed to left_lop/m
i2cset -y -f 0 0x18 84 0x80 #pga_r routed to left_lop/m
i2cset -y -f 0 0x18 89 0x80 #dac_l1 routed to right_lop/m
i2cset -y -f 0 0x18 92 0x80 #dac_r1 routed to right_lop/m
i2cset -y -f 0 0x18 88 0x80 #pga_l routed to right_lop/m
i2cset -y -f 0 0x18 91 0x80 #pga_r routed to right_lop/m
i2cset -y -f 0 0x18 86 0x09 #left_lop/m not muted, fully powered up
i2cset -y -f 0 0x18 93 0x09 #right_lop/m not muted, fully powered up

    Best,
    Mir