• State Resolved
  • Locked Locked
  • Replies 9 replies
  • Answers 1 answer
  • Subscribers 30 subscribers
  • Views 199 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TLV320AIC3106: PGA_R Volume Control vs DAC_R 1 Volume Control

Giri Rama
Prodigy 10 points
Part Number: TLV320AIC3106


Tool/software:

Hello

New to the chip, and having to fix audio routing issues behind on schedule.

Is it that Register 91 routes PGA_R directly to Right_LOP and Register 92 Routes PGA_R into DAC_R then routes to Right_LOP?

Bit confused on how these registers affect the routing - trying to get Line1R to Right LOP (single ended).

Thank you.

Giri

  • 0
    TI__Mastermind 48215 points

    Hi Giri,

    You are correct that Register 91 routes the PGA_R output directly to Right LOP/M.

    Register 92 does not involve PGA_R. DAC_R is the output signal from the DAC after receiving the digital input I2S signal. Register 92 connects this DAC output to Right LOP/M.

    The functional block diagram shows how PGA_R and DAC_R are different signals that go into the mixing block. Details on the mixer are found in section 10.3.5 of the datasheet.

    Best regards,
    Jeff McPherson

  • 0 in reply to Jeff McPherson
    Prodigy 10 points

    Thank you for that description.

    The diagram showed this, but I did not know how to interpret the info.

    Thanks again.

    Giri

  • 0 in reply to Giri Rama
    Prodigy 10 points

    If I could ask a follow on qustion.

    I am trying to route Line1LP via the Right PGA to Right_LOP.

    I have set Registers 16, 24, 91 and 93. But do not get the route to complete.

    If I do Audio Bypass - the audio shows up on Right_LOP (so I think I have confirmed the board).

    Is there a register(s) I am missing or am I mis-understanding the routing?

    Thanks 

    Giri

  • 0 in reply to Giri Rama
    Prodigy 10 points

    Wrong about the Bypass.

  • 0 in reply to Giri Rama
    TI__Mastermind 48215 points

    Hi Giri,

    So passive bypass does not work either? Can you share the exact register values you are writing to your registers?

    Also are you providing I2S clocks to the device? Clocks will still be needed in the active bypass mode.

    Thanks,
    Jeff McPherson

  • 0 in reply to Jeff McPherson
    Prodigy 10 points

    I am guessing Bypass did not work as I was going from Left Channel to the Right LOB (and if I read the DS right),  ByPass is only for the same channel.

    Need to route Line1LP to Right_LOB. (I have boards build based on last engineer's design).

    WriteCodecReg ((uint8_t) 16, (uint8_t) 0x04);

    WriteCodecReg ((uint8_t) 24, (uint8_t) 0x00);

    WriteCodecReg ((uint8_t) 91, (uint8_t) 0x80);

    WriteCodecReg ((uint8_t) 93, (uint8_t) 0x28);

    Appreciate your help.

    Giri

  • 0 in reply to Giri Rama
    Prodigy 10 points

    No I2S Audio. I only have Line1L, Line1R, and Mic3R audio as input.

  • 0 in reply to Giri Rama
    TI__Mastermind 48215 points

    Hi Giri,

    Try changing Register 93 to 0x29 instead of 0x28. I know the datasheet says the LSB is a read only bit, but this is a typo and it is actually the bit that controls power up of the driver. This bit needs to be set to 1.

    Best regards,
    Jeff McPherson

  • 0 in reply to Jeff McPherson
    Prodigy 10 points

    Jeff - Thank you very much. That was it. 

    Horrible of TI not to have updated this DS in 4 years since last publication.

    Very much appreciate your time and knowledge.

    Giri