3755.LEI-545 - [Schematics].pdf3858.src4382.pdfHello,
I am using the SRC4382 in a video broadcast product, that will be used to embed AES to an SDI video stream. What I am trying to do, is send the incoming AES to the RX and out the serial port B, through the SRC. Then the serial data is looped around to the serial port B input, and out the TX. The end result should be an AES signal, generated with timing signals from the SDI input, that is Synched to the SDI. The channel status data is transfered from input to output AES. I will paste in this question that I emailed to a TI engineer that is no longer available. Any help will be apprecicated.
Thanks,
Tim
Hello Leonard,
Well, we are moving right along with this project. Just have one question. We have tied the 'Serial Port B IN' and the 'Serial Port B OUT' together, and used the same clocks on both ports. On page 9, figure 1, of the attached datasheet, it shows the timing of the bit clock to data. On page 25 is says that the output data is clocked on the falling edge of the bit clock, and the incoming data is clocked on the rising edge of the bif clock. Does this mean that connecting these two ports together will allow the data to be maintained correctly? I have also attached the drawing for the product.
Thanks for any help.
Tim Davis
