OPA1633: Proper way to protect ADC input

Hello Alex,

I am glad to help out on this topic.  Do you know if you can answer some of my leading questions below?

1. Is the source signal into the OPA163x within a fixed range, or is the signal able to vary widely?

2. What gain would the amplifier need to be in?  Would you consider a non-unity gain (not a buffer)?

3. Depending on the input signal we can apply gain or attenuation with the OPA1633.  Would either of these be an option?

We often help customers design the attenuation or gain stage of the signal chain to maximize but not exceed the full-scale input range of the ADC.  Is the input FSR (full-scale range) the -0.3 to 3.6V you shared?  Or is the spec you provided the absolute maximum pin voltage?  If there is an FSR spec that would be beneficial to know.

Best,

Alec

Hi Alec,

The signal source is supposed to be a low impedance signal of max 2VRMS from a microphone preamp or line input buffer. The gain should be 1 (the ADC takes 2VRMS full scale). While ideally the input stage before the OPA clamps the voltage to the maximum range, I still want to make sure that any transients or malfunctions don't damage the ADC. -0.3 to 3.6V is the absolute maximum rating.

Hello Alex,

Instead of limiting our signal amplitude and cutting our SNR which will have an effect on the system, perhaps I can work on a clamping/clipping function for the OPA1633 circuit.  I have colleagues I can ask about this.

Thank you for following up with more details.

Best,

Alec

Hello Alex,

I have had a few different projects to work on lately; I want to reconnect on this support and check if you still require assistance?

Best,

Alec

Yes. I was thinking whether it would be appropriate to just clamp the output with diodes. How does the device behave when in overcurrent conditions?

Hello Alex,

For overcurrent conditions, are you referring to how much current the amplifier would source or sink from a transient spike?

The typical output current of the OPA1633 is 85mA.  Are we including any filtering between the amplifier and the ADC inputs?  These passive component values would also limit or be affected by any excess output current from the OPA1633.

I do agree you can clamp the output with diodes, but you do encounter a trade-off of having your output signal be limited to whatever you determine the clamping voltage to be.  Is your 2VRMS signal centered on a DC 1V?  Is this also how you have the output common mode of the OPA1633 set?

I can continue to help out here.  If you need me to draw up a schematic in simulation or want to share any images, let me know.

Best,

Alec

There would be 10 ohm resistors between the OPA outputs and ADC inputs, plus a 15nF capacitor between the ADC inputs. That's about it. The center voltage is 1.65V.

Hi Alex,

Thank you.  I will work on my response.

Best,

Alec