TLV320ADC3140_SCH_20251212.pdf
Hi,
could you help to review the sch,and there is an issue need to confirm.
When the TLV320ADC powered on,pin 21(sdout) default to inernal pull-up , pull-down or high resistance state?
TLV320ADC3140_SCH_20251212.pdf
Hi,
could you help to review the sch,and there is an issue need to confirm.
When the TLV320ADC powered on,pin 21(sdout) default to inernal pull-up , pull-down or high resistance state?
Hi Daojin,
Please make sure there are pull-ups to IOVDD on SCL and SDA.
By default, SDOUT outputs 0, but this can be programmed to Hi-Z in bit 0 of register 0x07:

Best,
Garret