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TLV320ADC6140: Internal decimation

GAL REUVEN
Prodigy 10 points
Part Number: TLV320ADC6140


 

Hello,

We are using the TLV320ADC6140 to sample some analog mics.

FSYNC = 48 KHz

To get the samples in 8KHz sampling rate, we are using internal decimation of the ADC.

  1. Is it true that the decimation process will be also result with some impairment to the samples resolution due to fixed point calculations in the ADC ?
  2. Can we read about it in TI's application note?
  3. See attached photos. We've recordded a wav while the system is in clossed box and expected to have only several bits changing. However, we got the following histograms. There too many bits active and the word starting from bit#16, while the ADC supposed to be around 19-20bits wide. How that can be explained?
  4. Also attached dump of the current ADC registers.

Best regards,

Gal

ADC_register_dump.txt 

  • 0
    TI__Expert 8480 points

    Hi Gal,

    I didn't completely understand the query on the internal decimation filter causing impairment to the samples resolution due to fixed point calculations in the ADC? Are you observing higher noise in the signal?

    Is it also possible to share the .wav file of the recording that you have done? Is the test signal a sinusoid, or a voice signal?

    Thanks and regards,

    Lakshmi Narasimhan

  • 0 in reply to Lakshmi Narasimhan Badrinarayanan
    TI__Expert 8480 points

    Hi Gal,

    A couple of additional follow-up questions:

    In the thread, you have mentioned that the FSYNC is 48kHz, but the recording is sampled at 8kHz. Does that mean that there is a separate decimation/down sampling from 48kHz to 8kHz happening outside the device?

    If so, is it possible to share the recording for both 48kHz (raw ADC output) and 8kHz (down-sampled) output?

    Thanks and regards,

    Lakshmi Narasimhan