Part Number: PCM5122
Hi,
I have a oscillator connected to the SCK pin of 36.864MHz and I want to use the chip in I2S master mode. this is connected to my STMcontroller which streams with a sampling frequency of 48KHz.
I made my init function below for the streaming I set up a DMA stream.
WhenI measure, I measure the following on the I2S lines:
SCK: 36.864MHZ (from oscilator)
BCK: 1.152MHz (which I don't believe to be correct)
SD: (Has data)
WS: 9KHz (which I don't believe to be correct)
I read the read only registers but the only conclusion I feel I can make is that I made a mistake somewhere in my clocking setup:
Reg 0x04 - PLL: UNLOCKED, Enabled=1
Reg 0x5A - Overflow Flags: L1OV=0 R1OV=0 L2OV=0 R2OV=0 SFOV=0
Reg 0x5B - Detected FS: Error, SCK ratio: 0
Reg 0x5D - Detected BCK ratio: 128 BCKs per frame
Reg 0x5E - Clock Status: CDST=0 PLL-L=0 LRCK/BCK=1 FS-SCKr=0 SCKval=1 BCKval=1 FSval=0
Reg 0x5F - Clock Error Flags: LTSH=0 CKMF=0 CSRF=0 CERF=1
Reg 0x6C - Analog Mute: Left=0 Right=0
Reg 0x78 - Auto-Mute: Left=0 Right=0
Here is the code for my init funcion as well, I control the chip via I2C
HAL_StatusTypeDef PCM5122_Init(void)
{
HAL_StatusTypeDef status;
// Page 0
status = PCM5122_WriteRegister(0x00, 0x00);
if (status != HAL_OK) return status;
// Soft Reset ON
status = PCM5122_WriteRegister(0x02, 0x10);
if (status != HAL_OK) return status;
HAL_Delay(10);
// Page 253
status = PCM5122_WriteRegister(0x00, 253);
if (status != HAL_OK) return status;
// Clock flex
status = PCM5122_WriteRegister(0x3F, 0x11);
if (status != HAL_OK) return status;
status = PCM5122_WriteRegister(0x40, 0xFF);
if (status != HAL_OK) return status;
// Page 0
status = PCM5122_WriteRegister(0x00, 0x00);
if (status != HAL_OK) return status;
// MASTER mode
status = PCM5122_WriteRegister(0x09, 0b00010001);
if (status != HAL_OK) return status;
// Disable auto clock
status = PCM5122_WriteRegister(0x25, 0b00000010);
if (status != HAL_OK) return status;
// Reset BCK/LRCK dividers
status = PCM5122_WriteRegister(0x0C, 0b00000000);
if (status != HAL_OK) return status;
status = PCM5122_WriteRegister(0x0C, 0b00000011);
if (status != HAL_OK) return status;
// Clock source = SCK
status = PCM5122_WriteRegister(0x0E, 0b00110000);
if (status != HAL_OK) return status;
// DAC clock divider (correct for 36.864 MHz → 48 kHz)
status = PCM5122_WriteRegister(0x1C, (48-1)); // 48-1
if (status != HAL_OK) return status;
// I2S format
status = PCM5122_WriteRegister(0x28, 0b00000011);
if (status != HAL_OK) return status;
// Disable auto mute
status = PCM5122_WriteRegister(0x41, 0x00);
if (status != HAL_OK) return status;
//Configure PLL for audio core (48 kHz target, 36.864 MHz SCK)
status = PCM5122_WriteRegister(0x14, (3 -1)); // PLL P
if (status != HAL_OK) return status;
status = PCM5122_WriteRegister(0x15, 1); // PLL J
if (status != HAL_OK) return status;
status = PCM5122_WriteRegister(0x17, 8); // PLL D
if (status != HAL_OK) return status;
status = PCM5122_WriteRegister(0x18, (8-1)); // PLL R (post-divider)
if (status != HAL_OK) return status;
// Enable PLL
status = PCM5122_WriteRegister(0x04, 0b00000001);
if (status != HAL_OK) return status;
HAL_Delay(10); // wait for PLL to lock
// Unmute DACs
status = PCM5122_WriteRegister(0x03, 0x00);
if (status != HAL_OK) return status;
// Soft Reset OFF
status = PCM5122_WriteRegister(0x02, 0x00);
if (status != HAL_OK) return status;
HAL_Delay(10);
return HAL_OK;
}
