Part Number: AM62P
Hello Team,
We are using TAS6501 with McASP peripheral (to tramsit a audio data) - in I2S mode. Intergrated with the MCU+ SDK for AM62P – version 11-010103. TAS6501 is configured and then McASP init is done.
Configuration for McASP as follows:
MCASP Transmit Clock Configuration
Slot size: 32 bits
McASP AUXCLK Rate - 48 MHz (Fixed - Not able to edit from syscfg tool)
Transmit Frame Sync Rate - 48 KHz (Tool Calculated FSX: 46.875 KHz)
Aux clk: 48MHZ, with the internal clock divider factor the bit clock source is 3MHZ.
As the slot size is 32bits: 3Mhz/48khz(sampling rate) = 62.5 bits
Our understanding, due to this we could see bit error frames on I2S data lines.
To match to 64bits, expected bit clock should be 3.072 MHz. But we are not able to achieve this due to fixed 48MHZ aux clock.
Please let us know how to achieve this configuration
Attached the testlogs and sys configuration for reference 
