Part Number: TAS2562
Part: TAS2562 (REV_ID reads 0x10), I2C control, no PPC3 firmware loaded.
Software: Linux mainline ASoC `tas2562` codec driver (kernel 6.6), register access via I2C.
Goal: Use the on-chip Load Diagnostics (datasheet SLASEI7A §8.4.6) to read speaker
impedance / open-short status from the driver, without the PPC3 tuning flow.
What we do (standalone method, datasheet §8.4.6 + Table 6/98)
With the device powered (SDZ high) and confirmed alive over I2C:
`MISC_CFG4 (P0/0x3D) = 0x0E` → LDG_CLK = internal oscillator, IVSNS_AVG = 100 ms
`INT_MASK1 (P0/0x1B)` bit5 = 0 → unmask "load diag complete"
`INT_CLK (P0/0x30)` bit2 = 1 → INT_CLR_LTCH (clear latched status)
`PWR_CTRL (P0/0x02) = 0x02` → MODE = Software-Shutdown, ISNS_PD = VSNS_PD = 0 (I/V-sense on)
`PWR_CTRL (P0/0x02) = 0x42` → set LDG_MODE (bit6) to run the standalone diagnostic
Poll `INT_LTCH1 (P0/0x25)` for bit5 (done); read fault bits [4:3]
Read `LD_RES_VAL1` = `P4/0x18..0x1B`
We also tried the MODE = 2'b11 ("Perform Load Diagnostics") method, and both internal-OSC
and external-TDM clock (`LDG_CLK`), with I/V-sense TDM slots enabled (TDM_CFG5 VSNS_EN /
TDM_CFG6 ISNS_EN).
Observed result (verified via raw I2C while the amp was powered/playing)
Chip is alive: `REV_ID (P0/0x7D) = 0x10`, `VBAT` SAR ≈ 0x50, `TEMP` SAR valid.
Thresholds are at datasheet defaults: `LD_CFG0..3 (open UT) = 0x64,0,0,0`,
`LD_CFG4..7 (short LT) = 0,0x80,0,0`.
No faults pending: `INT_LIVE0/1 = 0`.
After the trigger, `INT_LTCH1` never sets bit5 (done) — it stays 0x00, no fault bits,
and `LD_RES_VAL1` stays 0x00000000. The MODE=11 method leaves MODE stuck at 2'b11
(never auto-transitions to Active/Shutdown). ~500 ms poll.
Questions
Does TAS2562 Load Diagnostics work from bare register writes, or does it require a
PPC3-generated coefficient / initialization download first? (i.e. is the measurement
engine gated by the DSP/coefficient boot?)
If it works standalone, what is the exact required register sequence and the
preconditions to make `INT_LTCH1` completion assert and `LD_RES_VAL1` populate?
Specifically — for the diagnostic to run, must the device have:
the PVDD/boost / analog supply actively up (not just SDZ high)?
a running SBCLK/FSYNC (TDM clock), even when `LDG_CLK` = internal oscillator?
the Class-D actually enabled (i.e. it cannot run purely from Software-Shutdown)?
the I/V-sense enabled beyond clearing ISNS_PD/VSNS_PD (TDM slot assignment, calibration)?
Is there a minimum settle time between entering Software-Shutdown, setting LDG_MODE,
and the completion?
Why would MODE = 2'b11 remain stuck at 2'b11 rather than auto-transitioning after the
measurement?
What we'd ideally receive
A minimal, ordered I2C register write/read log (book/page/addr = value) that performs
one successful Load Diagnostic on TAS2562 and yields a valid `LD_RES_VAL1`, from a
known state (e.g. from HW-shutdown or from Active).
