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TLV320DAC3100 lowest power state?

Other Parts Discussed in Thread: TLV320DAC3100

Hi,

We are trying to minimize board peripheral and are now focusing on TLV320DAC3100.

First, we searched the document for “standby” but didn’t find any information. So it seems that standby current/power at least has not been documented.

Second, there is no pin like “PWDN” or “STANDBY” to put the device into lower-power module.

Third, “5.4.1 MICBIAS” says when MICBIAS is powered down the current consumption is the lowest, and it is controlled by bits D1-D0 of page 1’s register 46. This register is documented on datasheet page 79, and the default value for D1-D0 is 00h, which already puts MICBIAS powered down so the current is miminum.

I wonder if there is any additional control, either by pin or by programming registers, to do some further power saving? When TLV320DAC3100 is not performing any action, nor receiving any command or data from host CPU, is it already in its designed lowest-power state?

 

Paul

  • Paul,

     For DAC3100, the lowest power is when the RESETz pin is kept low. This is the extreme case device goes into reset state and everything needs to be reprogrammed.

    Another way is to turn off the blocks that was is not in use. MICBIAS is just one of them.

    For example, When DAC is not in use, power down the DAC, any drivers that was turned on etc.

    You can selectively turn off PLL, ADC, DAC, Drivers (Headphone, Speaker), MICBIAS etc. This way devices gives full control to the user.

  • Vins,

    We will test each of the modules. Thanks a lot for the information.

    Paul