We are using AIC3256 for some audio processing. The design has a 12.288M Hz oscillator input to MCLK. The analog audio signal goes through ADC and some miniDSP processing functions and then output through line-out.
The problem we have is that we observe output clock signals from BCLK and WCLK pins. These output signals cause some radiated EMI issues. In our design, we are not using digital audio interface (I2S) at all so there is no reason to use BCLK and WCLK pins.
Is there any way to stop output of these clock signals through BCLK & WCLK pins?