I am using the ezDsp C5505 runing the demo program (aic3204_loop_linein.c) that loops audio in and out to the headphones.
I have changed the sample rate to 8K and want to put a low pass filter on the input to the ADC.
I have loaded the coefficients into BiQuad A and enabled PRB_R2. I think I followed the right sequence based on some of the other posts but t is still not filtering.
What did I miss?
Here is the code:
Int16 aic3204_loop_linein( )
{
Int16 i, j;
Int16 sample, data1, data2, data3, data4;
/* Configure Serial Bus */
SYS_EXBUSSEL |= 0x0100; // Configure Serial bus 0 for I2S0
/* Configure AIC3204 */
AIC3204_rset( 0, 0 ); // Select page 0
AIC3204_rset( 1, 1 ); // Reset codec
AIC3204_rset( 0, 1 ); // Point to page 1
AIC3204_rset( 1, 8 ); // Disable crude AVDD generation from DVDD
AIC3204_rset( 2, 1 ); // Enable Analog Blocks, use LDO power
AIC3204_rset( 0, 0 ); // Page 0
/* PLL and Clocks config and Power Up */
AIC3204_rset( 27, 0x1d ); // BCLK and WCLK is set as o/p to AIC3204(Master)
AIC3204_rset( 28, 0x00 ); // Data ofset = 0
AIC3204_rset( 4, 3 ); // PLL setting: PLLCLK <- MCLK, CODEC_CLKIN <-PLL CLK
AIC3204_rset( 6, 8 ); // PLL setting: J=8
AIC3204_rset( 7, 15 ); // PLL setting: HI_BYTE(D)
AIC3204_rset( 8, 0xdc ); // PLL setting: LO_BYTE(D)
AIC3204_rset( 30, 0xB0 ); // BCLK=DAC_CLK/N =(12288000/48) = 256kHz = 32*fs
AIC3204_rset( 5, 0x91 ); //PLL setting: Power up PLL, P=1 and R=1
AIC3204_rset( 13, 3 ); // Hi_Byte(DOSR) 768
AIC3204_rset( 14, 0 ); // Lo_Byte(DOSR)
AIC3204_rset( 20, 0x80 ); // AOSR for AOSR = 128 decimal or 0x0080 for decimation filters 1 to 6
AIC3204_rset( 11, 0x88 ); // Power up NDAC and set NDAC value to 8
AIC3204_rset( 12, 0x82 ); // Power up MDAC and set MDAC value to 2
AIC3204_rset( 18, 0x88 ); // Power up NADC and set NADC value to 8
AIC3204_rset( 19, 0x82 ); // Power up MADC and set MADC value to 2
AIC3204_rset( 0x51, 0x00 );// Power down Left and Right ADC
AIC3204_rset( 0x3F, 0x14 ); // Power down left,right data paths and set channel
AIC3204_rset( 61, 2 ); // PRB_R2
// set biquad A to low pass fc = 3628
AIC3204_rset( 0, 8 ); // Select page 8
AIC3204_rset( 36, 0x6A ); // Left N0 H
AIC3204_rset( 37, 0xC3 ); // Left N0 M
AIC3204_rset( 38, 0x6F ); // Left N0 L
AIC3204_rset( 40, 0x35 ); // Left N1 H
AIC3204_rset( 41, 0x61 ); // Left N1 M
AIC3204_rset( 42, 0xB7 ); // Left N1 L
AIC3204_rset( 44, 0x00 ); // Left N2 H
AIC3204_rset( 45, 0x00 ); // Left N2 M
AIC3204_rset( 46, 0x00 ); // Left N2 L
AIC3204_rset( 48, 0xD5 ); // Left D1 H
AIC3204_rset( 49, 0x3C ); // Left D1 M
AIC3204_rset( 50, 0x91 ); // Left D1 L
AIC3204_rset( 52, 0x00 ); // Left D2 H
AIC3204_rset( 53, 0x00 ); // Left D2 M
AIC3204_rset( 54, 0x00 ); // Left D2 L
AIC3204_rset( 0, 9 ); // Select page 9
AIC3204_rset( 44, 0x6F ); // Right N0 H
AIC3204_rset( 45, 0x96 ); // Right N0 M
AIC3204_rset( 46, 0x52 ); // Right N0 L
AIC3204_rset( 48, 0x37 ); // Right N1 H
AIC3204_rset( 49, 0xCB ); // Right N1 M
AIC3204_rset( 50, 0x29 ); // Right N1 L
AIC3204_rset( 52, 0x00 ); // Right N2 H
AIC3204_rset( 53, 0x00 ); // Right N2 M
AIC3204_rset( 54, 0x00 ); // Right N2 L
AIC3204_rset( 56, 0xD0 ); // Right D1 H
AIC3204_rset( 57, 0x69 ); // Right D1 M
AIC3204_rset( 58, 0xAD ); // Right D1 L
AIC3204_rset( 60, 0x00 ); // Right D2 H
AIC3204_rset( 61, 0x00 ); // Right D2 M
AIC3204_rset( 62, 0x00 ); // Right D2 L
/* DAC ROUTING and Power Up */
AIC3204_rset( 0, 1 ); // Select page 1
AIC3204_rset( 0x0c, 8 ); // LDAC AFIR routed to HPL
AIC3204_rset( 0x0d, 8 ); // RDAC AFIR routed to HPR
AIC3204_rset( 0, 0 ); // Select page 0
AIC3204_rset( 64, 2 ); // Left vol=right vol
AIC3204_rset( 65, 0 ); // Left DAC gain to 0dB VOL; Right tracks Left
AIC3204_rset( 63, 0xd4 ); // Power up left,right data paths and set channel
AIC3204_rset( 0, 1 ); // Select page 1
AIC3204_rset( 0x10, 10 ); // Unmute HPL , 10dB gain
AIC3204_rset( 0x11, 10 ); // Unmute HPR , 10dB gain
AIC3204_rset( 9, 0x30 ); // Power up HPL,HPR
AIC3204_rset( 0, 0 ); // Select page 0
USBSTK5505_wait( 100 ); // wait
/* ADC ROUTING and Power Up */
AIC3204_rset( 0, 1 ); // Select page 1
AIC3204_rset( 0x34, 0x30 );// STEREO 1 Jack
// IN2_L to LADC_P through 40 kohm
AIC3204_rset( 0x37, 0x30 );// IN2_R to RADC_P through 40 kohmm
AIC3204_rset( 0x36, 3 ); // CM_1 (common mode) to LADC_M through 40 kohm
AIC3204_rset( 0x39, 0xc0 );// CM_1 (common mode) to RADC_M through 40 kohm
AIC3204_rset( 0x3b, 0 ); // MIC_PGA_L unmute
AIC3204_rset( 0x3c, 0 ); // MIC_PGA_R unmute
AIC3204_rset( 0, 0 ); // Select page 0
AIC3204_rset( 0x51, 0xc0 );// Powerup Left and Right ADC
AIC3204_rset( 0x52, 0 ); // Unmute Left and Right ADC
AIC3204_rset( 0, 0 );
USBSTK5505_wait( 100 ); // Wait
/* I2S settings */
I2S0_SRGR = 0x0;
I2S0_CR = 0x8010; // 16-bit word, slave, enable I2C
I2S0_ICMR = 0x3f; // Enable interrupts
/* Play Tone */
// for ( i = 0 ; i < 8000 ; i++ )
while ( 1 )
{
for ( j = 0 ; j < 1000 ; j++ )
{
// for ( sample = 0 ; sample < 48 ; sample++ )
for ( sample = 0 ; sample < 8 ; sample++ )
{
/* Read Digital audio input */
data3 = I2S0_W0_MSW_R;
data1 = I2S0_W0_LSW_R;
while((RcvR & I2S0_IR) == RcvR)
data4 = I2S0_W1_MSW_R;
data2 = I2S0_W1_LSW_R;
/* Write Digital audio input */
I2S0_W0_MSW_W = data3;
I2S0_W0_LSW_W = 0;
//while((XmitR & I2S0_IR) == XmitR)
I2S0_W1_MSW_W = data4;
I2S0_W1_LSW_W = 0;
}
}
}
/* Disble I2S */
I2S0_CR = 0x00;
AIC3204_rset( 1, 1 ); // Reset codec
return 0;
}
Thanks in advance, Sam
