I'm trying to program a micro with 32-bit size word to connect to TLV32 Codec. I'm using the uC as the I2S master for transmit only.
I'm using standard I2S mode with 32 bit word.
The problem is that in I2S, the data MSB is latched 1 clock cycle after the WS assertion of left channel. To get 32 bits per channel, the lsb of left channel is going to come out on the 1st bit after WS rise to latch in the Right channel. So it follows that the lsb of the Right channel is going to come out 1 bit after the fall of WS.
The problem is that if the uC stops the transmission, the last double word (32+32=64 bits) must be transmitted before the stop. In transmitting the last word Should the uC transmit lsb of right channel before stopping? If it does, it leaves WS as low and the codec waiting for more data. If it doesn't, it won't send the lsb of the last word on the right channle causing corruption of the word. What is the proper way to stop this transmission?!
This problem will not exist if the right justified format is used. But that is not I2S compatible. Please help. Tx.