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PCM1791 audio DAC differential output DC voltage offset

Radosvet B.
Intellectual 490 points
Other Parts Discussed in Thread: DRV603, OPA2134, PCM1791A
Dear TI audio IC designers,
 
 
We need in PCM1791 audio DAC additional information:
 

1. What is the maximum differential output DC voltage offset /VoutL+ - VoutL-/ or /VoutR+ - VoutR-/ on the PCM1791 DAC voltage outputs measured at BPZ output state?

 

2. What is the maximum possible differential DC voltage offset temperature drift /VoutL+ - VoutL-/ or /VoutR+ - VoutR-/ on the PCM1791 DAC voltage outputs measured at BPZ output state?

 

 

Sincerely,
 
Alexander M.
  • 0
    TI__Expert 5555 points

    Hello Alexander,

     

    Sorry for the delay. I've been discussing this with the applications and design team and here's the feedback to your question.

     

    1. DC offset

    DC offset = DC output level at BPZ,

    This DC offset is defined as BPZ error, it is also specified as +/-2% of FSR( = 3.2Vpp ) max.

    (Please see the table at the bottom of page 3 of the datasheet)

     

    2. DC offset drift

    There is no temp drift specification for BPZ error, but, from characteristic test, it is  typically +/-100ppm/degC

    I don't believe we test this on every piece of silicon we release, so it's not guaranteed. Please consider it to be a "typical" rather than a tested "min/max".

     

    Many thanks

     

    Dafydd Roche

     

    P.S - if you want a nice line driver to drive the signal, then you might consider either an opa2134 or, the new DRV603, 2VRMS, single 3.3V supply line driver.

  • 0 in reply to Dafydd Roche
    Intellectual 490 points 
    Dear Dafydd,
     
     
    Thank you very much for your answer.
     
    If I understand your information clearly the PCM1791A output issues should be such as follows:
     
    1.PCM1791A Datasheet Terms and definitions.
     
    *Bipolar zero voltage* - the COMMON MODE DC voltage measured on each DAC output pin: VoutR+, VoutR-, VoutL+, VoutL- refer to analog ground (all the analog ground pins: AGNDC, AGNDF, AGNDL, AGNDR combined to get one net).
    All the DAC output pins are in state of constant zero data received (i.e. *bipolar zero*, BPZ)
    The PCM1791A Bipolar zero voltage typical value is 1.4Vdc.
     
    V_bpz=VoutR+=VoutR-=VoutL+=VoutL-=1.4 Vdc refer to AGNDC
    /when data received=0/.
     
     
    *Bipolar zero error* - the DIFFERENTIAL MODE output DC offset error voltage measured DIFFERENTIALLY on the pairs of DAC outputs pins of each channel: (VoutR+ and VoutR-) or (VoutL+ and VoutL-) and referred to the DAC full scale differential output voltage.
    BZE is given in percent.
     
    BZE,%=(Uos_error_dac_out/Uout_dac_FS)*100%
     
     
    2. Then the differential output DC voltage offset and drift:
     
    Uos_error_dac_out=(Uout_dac_FS*BZE)/100%;
     
    Uos_error_dac_out_max=(3.2Vp-p*2%)/100%=64 mV;
    Uos_error_dac_out_typ=(3.2Vp-p*0.5%)/100%=16 mV;
     
    Uos_error_drift_dac_out_typ=(Uos_error_dac_out_inppms*Uos_error_dac_out)/1000000;
     
    Uos_error_drift_dac_out_typ=(100ppm*16 mV_typ*(25+85))/1000000=0.176mV/Celsius Degree;
     
    In the operating temperature range: -25 to +85 Celsius Degrees.
     
     
    It might be some confusing that
    the *Bipolar zero voltage* - the COMMON MODE value, but
    the *Bipolar zero error* - the DIFFERENTIAL MODE value.
     
     
     
    Please, correct me if you find any of those considerations wrong.
     

     

     

     

    Sincerely,
     
    Alexander M.
  • 0 in reply to Dafydd Roche
    Intellectual 490 points 
    Dear Dafydd,

     

    Would you please check my design considerations on the PCM1791A output DC offset subject.

     

     

     

    Sincerely,

     

    Alexander M.

  • 0 in reply to Radosvet B.
    TI__Intellectual 1955 points

    Hi Alexander,

    Dafydd is currently traveling, we are looking to find someone else to help confrim.  Thanks for your patience.

    Regards,

    nancy!