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AIC3204 problem

Hello

I am trying this codec (slave) with xmc4500 (master) using i2c protocol to play some sound (may be a beep as per the example in reference guide by configuring

p0 / r 71-79) and trying to hear it back using standard headphone.

But unfortunately i am not getting anything.

I am using the standard configuration as per the appendix A,B,C,D of design and config guide (SLAA404B).

BCLK, WCLK are input , MCLK as PLL_clkin.

Any help would be highly appreciated.

Thanks

Sam

  • Please verify that the communication through I2C works properly by reading back the first page's registers from the AIC3204 and verifying the contents with the default values.

    If you have the TI EVM you can patch in the I2C from the TAS1020b on the EVM to your board and check if you can control the codec from the GUI which has example configurations for playback through headphones.

  • Thank you for your response.

    I am able to operate the beep generator.

    But i have next problem now.

    I want to provide my own raw data to AIC3204 and want to listen it back using headphone.

    So, my question is that if i want to provide 16 bit raw audio (which is been saved into a buffer ) to codec and in this regard i came across the following example :

      for ( i = 0 ; i < 5 ; i++ )
        {
            for ( j = 0 ; j < 1000 ; j++ )
            {
                for ( sample = 0 ; sample < 48 ; sample++ )
                {
                    /* Read Digital audio input */
                    while((Rcv & I2S1_IR) == 0);   // Wait for receive interrupt to be pending
                    data3 = I2S1_W0_MSW_R;  // 16 bit left channel received audio data
                      data4 = I2S1_W1_MSW_R;  // 16 bit right channel received audio data

                    /* Write Digital audio input */
                    while((Xmit & I2S1_IR) == 0);  // Wait for receive interrupt to be pending
                    I2S1_W0_MSW_W = data3;  // 16 bit left channel transmit audio data
                      I2S1_W1_MSW_W = data4;  // 16 bit right channel transmit audio data
                }
            }
        }

    but i am not able to understand how ADC and DAC is processing the data been provided by me.

    Any help would be highly appreciated.

    Thanks

  • The DAC gets it's digital audio datat from the digital audio interface (not the control interface). You have to configure your host processor and the AIC3204 to use the same digital audio format (for example 16-bit I2S), configure the AIC3204 to route the DAC output to the headphone output, configure the AIC3204 internal clocks to support your chosen sampling rate, power up the DAC and the amplifiers and then your host processor simply has to send the audio data to the digital audio interface (similar to your example, preferably through DMA, not in a CPU loop) and the DAC will convert it to analog continuously as long as there's audio data clocked into the AIC3204.

    It's similar for the ADC side but in the other direction.

    Some of the AIC3204 configuration is complex so TI provides control software (from the EVM product folder, http://www.ti.com/litv/zip/sloc128b) that has scripts with configuration data for common use cases (like HP playback or microphone record).

  • Hello

    Thanks for your response.

    I have been working out with the codec and now i am able to get some "HORN" kind of sound on headphones which is not at all same as of data i am providing.

    My configuration is:

    AIC3204_vWriteReg( 0x30, 0x00, 0x00);
        //#
        //# Initialize the device through software reset
        AIC3204_vWriteReg( 0x30, 0x01, 0x01);
        AIC3204_vDelay_100US (1000);
        //# Select Page 0
        //w 30 00 00
        AIC3204_vWriteReg( 0x30, 0x00, 0x00);
        AIC3204_vDelay_100US (100);
        //# Select MCLK as PLL_clkin
        //# Select PLL_CLK as CODEC_CLKIN
        AIC3204_vWriteReg( 0x30, 0x04, 0x07);
        AIC3204_vDelay_100US (100);
        //# Set PLL on, P=1, R=3
        AIC3204_vWriteReg( 0x30, 0x05, 0x93);
        AIC3204_vDelay_100US (100);
        //# Set J=8
        AIC3204_vWriteReg( 0x30, 0x06, 0x08);
        AIC3204_vDelay_100US (100);
        //# Set D=0
        AIC3204_vWriteReg( 0x30, 0x07, 0x00);
        AIC3204_vWriteReg( 0x30, 0x08, 0x00);
         //# NDAC = 5, dividers powered on
        AIC3204_vWriteReg( 0x30, 0x0B, 0x85);
        AIC3204_vDelay_100US (100);
        //# MDAC = 3, dividers powered on
        AIC3204_vWriteReg( 0x30, 0x0C, 0x83);
        AIC3204_vDelay_100US (100);
         //# Program the OSR of DAC to 128
        AIC3204_vWriteReg( 0x30, 0x0D, 0x00);
        AIC3204_vWriteReg( 0x30, 0x0E, 0x80);
        AIC3204_vDelay_100US (100);
         //# NADC = 5, dividers powered on
        AIC3204_vWriteReg( 0x30, 0x12, 0x85);
        AIC3204_vDelay_100US (100);
        //# MADC = 3, dividers powered on
        AIC3204_vWriteReg( 0x30, 0x13, 0x83);
        AIC3204_vDelay_100US (100);
        //# Program the OSR of ADC to 128
        AIC3204_vWriteReg( 0x30, 0x14, 0x80);
        AIC3204_vDelay_100US (100);
        //# Audio Interface = I2S
        //# Data Word length = 16 bits
        //# BCLK is input to the device
        AIC3204_vWriteReg( 0x30, 0x1B, 0x00);
        AIC3204_vDelay_100US (100);                                        
        //# DAC Signal Processing Block PRB_P1
        AIC3204_vWriteReg(0x30,0x3C,0x01) ;
        //# Point to Page 44
        AIC3204_vWriteReg(0x30,0x00,0x2C);       
        //# Adaptive Filtering enabled for DAC
        AIC3204_vWriteReg(0x30,0x01,0x04);             

        //###############################################
        //# Configure Power Supplies
        //###############################################
        //# Select Page 1
        AIC3204_vWriteReg( 0x30, 0x00, 0x01);
        AIC3204_vDelay_100US (100);
        //# Disable weak AVDD in presence of external
        //# AVDD supply
        AIC3204_vWriteReg( 0x30, 0x01, 0x08);
        AIC3204_vDelay_100US (100);
        //#
        //# Enable Master Analog Power Control
        //w 30 02 00
        AIC3204_vWriteReg( 0x30, 0x02, 0x01);
        AIC3204_vDelay_100US (1000);
        //#
        //# Set the input power-up time to 3.1ms (for ADC)
        //w 30 47 32
        AIC3204_vWriteReg( 0x30, 0x47, 0x32);
        AIC3204_vDelay_100US (1000);
        //#
        //# Set the REF charging time to 40ms
        //w 30 7b 01
        AIC3204_vWriteReg( 0x30, 0x7B, 0x01);
        AIC3204_vDelay_100US (1000);
        //#
        //###############################################
        //###############################################
        //# Configure DAC Channel
        //###############################################
        //#
        //# Select Page 1
        //w 30 00 01
        AIC3204_vWriteReg( 0x30, 0x00, 0x01);
        AIC3204_vDelay_100US (100);
       
        //# Set the DAC PTM mode to PTM_P3/4
        AIC3204_vWriteReg( 0x30, 0x03, 0x00);
        AIC3204_vWriteReg( 0x30, 0x04, 0x00);
        //# De-pop: 5 time constants, 6k resistance
        AIC3204_vWriteReg( 0x30, 0x14, 0x25);
        AIC3204_vDelay_100US (100);
        //# Set the Input Common Mode to 0.9V and Output Common Mode for Headphone to Input Common Mode
        AIC3204_vWriteReg( 0x30, 0x0A, 0x00);
        AIC3204_vDelay_100US (100)
        //# Route Left DAC to HPL
        AIC3204_vWriteReg( 0x30, 0x0C, 0x08);
        AIC3204_vDelay_100US (100);
        //# Route Right DAC to HPR
        AIC3204_vWriteReg( 0x30, 0x0D, 0x08);
        AIC3204_vDelay_100US (100);

        AIC3204_vWriteReg(0x30,0x0E,0x08);     
        AIC3204_vWriteReg(0x30,0x0F,0x08);


        AIC3204_vDelay_100US (100);
        //# Unmute HPL/HPR driver, 0dB Gain
        AIC3204_vWriteReg( 0x30, 0x10, 0x00);
        AIC3204_vWriteReg( 0x30, 0x11, 0x00);
        AIC3204_vDelay_100US (100);
        //# Power up HPL/HPR
        AIC3204_vWriteReg( 0x30, 0x09, 0x3C);
        AIC3204_vDelay_100US (100);
        //# Wait for 2.5 sec for soft stepping to take effect
        AIC3204_vDelay_100US (10000) ;
        AIC3204_vDelay_100US (10000)  ;
        AIC3204_vDelay_100US (5000)      ;

        //# Select Page 0
        //w 30 00 00
        AIC3204_vWriteReg( 0x30, 0x00, 0x00);
        AIC3204_vDelay_100US (100);
        //#
        //# DAC => 0dB
        //w 30 41 00 00
        AIC3204_vWriteReg( 0x30, 0x41, 0x30);
        AIC3204_vWriteReg( 0x30, 0x42, 0x30);

        //# Power up LDAC/RDAC
        AIC3204_vWriteReg( 0x30, 0x3F, 0xD6);
        AIC3204_vDelay_100US (100);

        //# Unmute the DAC digital volume control
        AIC3204_vWriteReg( 0x30, 0x40, 0x00);
        AIC3204_vDelay_100US (100);

    And the data i am providing is in RAW format converted by using AUDACITY. (PCM 16bit 44.1khz)

    I am not able to figure out the problem.

    Any help would be highly appreciated.

  • For debug, I suggest creating a sine wave 16-bit, 44.1 kHz on your controller (I would not use the output from Audacity, just to avoid another possible source of format mismatch) in RAM and sending this data to the AIC. You can then compare the output signal on a scope with the expected signal, which will give us a better idea what is wrong.

     

  • Hi

    sorry for late response.

    I have tried with many waves including the sine wave (16 bit pcm, 441.khz, 400 hz freq) the sound is almost same as is in audacity and i am also able to see the output at headphone pin using oscilloscope.

    The problem is that the wave is clipped (non uniformly) to solve this, i have played with the gain of HPL and HPR and i am now able to reduce the clipping up-to an amount but still i am not able to have a perfect sine waveform.

  • Hello

    Just for some further detail...

    I am sending sine wave of 44.1 khz 16 bit signed PCM in big-endian mode but as i explained before on AIC i am not able to see the same spectrum as expected.

    I am waiting for your response.

    Thanks