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PPS topology functionality

Other Parts Discussed in Thread: PCM3070, DIR9001

Attached is a view of my default PPS. I build and download code, copy and save the main_Rate44.cfg file and modify it for appropriate clock rates etc and resave it as a .txt file. I then load it as a script file in my CS and load this directly into my custom prototype board to the PCM3070 registers via I2C. I wrote script files for the four mux's to load with CS and choose the PPS path accordingly on the fly. I also wrote script files for loading coefficients (adaptive filtering) on all Biquads. I used adaptive filtering on all Biquads. Since I have a mono signal, I only load the left side on all Biquad script files. I verified that every mux, switch, biquad filter works correctly on initial start up. If I load a CS script file for any of the five biquads (ie, 74, 75, 76, 77, 78) and then load script file for the DRC_1 (2:1 w/limiter) the signal path fails. I can restore signal path if I switch to the 1:1 linear DRC_2 but it fails again with the 2:1 DRC selection. I need insight on the fix for this problem.  I can send scipt files if needed.  Thanks.  

  • Hi, Thomas,

    Sorry for the delay in getting back to you. I've asked my colleagues to chime in here.

    -d2

  • Hi Thomas,

    I tried two-DRC settings with a simple processflow in TI PCM3070 EVM board(as shown below---DRC1  1:1 & DRC2  2:1) and both of them work well.

    Have you tried your processflow with PCM3070EVM?  Would you please help to send your processflow to me?  If you attach your PFW, we will take a look. Thank you.

    I would like to check it and try to find root cause for this issue.

     

    BTW, my PurePath Stadio version is as follows:

     

    I am in China and maybe my reply will be delayed sometimes because of time-zone difference.

     

    BR.

    Austin

  • Hi Tom,

     

    Please try my files in your side (Please check the e-mail attachement).

    I tried DRC1 and DRC2 in EVM and they work well now.

    The root cause for this issue should be your SystemSettingCodes. I checked it in your processflow and replaced it.

    Thank you.

     

     

    Detailed information is as follows:

     

    I have tried your processflow and found I could not pass build with your settings.

     

    I checked your SystemSettingCodes in your processflow and replaced it with mine.  Finally, the build was sucessful.

     

     

    I tried DRC1 and DRC2 in EVM and they work well now. Please try my files in your side. Thank you.

     

     

     

    Thanks.

    Best wishes.

    ************************************************************* 

    ♪  Austin HE   TEXAS INSTRUMENTS  ♪

    *************************************************************

      

     

  • Tom:

    Does the process flow operate correctly when loaded to the PCM3070EVM?  Can you control the DRC using PPS on the EVM?  This can help isolate where the source of the problem may be.  If it works on the EVM then you can compare your scripts with the data loaded from the EVM.  You can enable the I2C Log from the Tools menu on PPS and save the commands for comparison with your CS scripts.  Here is a description of how to use the I2C logging feature:

    The I²C Logging Tool allows you to log I²C writes that are written to a board that is connected.From the Tools menu, select I2C Logging to turn it on. To turn it off, simply uncheck it.

    When this option is selected, a log file will be created in the process flow folder with the same name as the process flow. If a known component is related to the write, the log will record the component's name and description along with the values that will be written to the component's address. If the component is unknown, the name and description for the log will be //Unknown.

    Best Regards,

    BAK

  • BAK,

    The process flow operated correctly when loaded in the PCM3070EVM. This was weeks ago. I will try it again.

    Since then I migrated to a prototype board where I load its 3070 registers with the EVM I2C bus that I disconnected from its 3070 and reconnected to the proto boards 3070. I can then use CS and load the script file (that was previously EVM generated) into my proto 3070 registers. I also wrote scripts to load via CS to operate my muxs and biquads. All functions on the prototype board work correctly. I can verify with an audio FFT the frequency response of the biquads and I have exercised all functions (including both DRCs) and verified they all work correctly. Please note that the two biquad in the custom=1 path are meant to operate on the fly with many different HP/LP frequency combinations. (The muxs will also operate on the fly). The other biquads in the voice, wide, HA path are non-adaptive but I wrote script files with these adaptive. The problem is when I use mono_mux_1 and switch to custom=1 from either wideband=2, voice=3 or HA=4 the frequency response of the two series biquads don't return to the one I chose. The same applies to the mux between the DRCs and the custom, wide, voice, HA path. When I do a CS register dump I usually have to push the CS "execute" twice for the applicable registers to be correct.

    I believe I implemented the script files incorrectly (for adaptive mode)(mono signal). I attached a few of them for your inspection to see if I implemented them correctly. They are in various stages of experimentation in an attempt to solve this problem. I could attach portions of my main_Rate44.cfg script file which I have also modified  if necessary.

    Thanks.

    # 3/21/13 Biquad High Pass fc=125Hz 1st order butterworth
    ###############################################
    #
    # Select Page 0
    ###     w 30 00 00
    #
    # PRB_P2 selected
    ###     w 30 3C 02
    #
    # Select Page 44, Enable Adaptive filtering for DAC
    ###     w 30 00 2c 04
    # ###############################################
    # biqual_1, DSP coeff=25 (0x19), I2C page=44 (0x2C), I2C reg=108 (0x6C), length=5 (bo,b1,b2,a0,a2)
    # B0=0x7EDD00
    # B1=0xC09200
    # B2=0x000000
    # A1=0x3EDE00
    # A2=0x000000
    #
    #
    ###############################################
    #
    # select page and write to Buffer A’s registers:
    #
    # BIQUAD A, (Page 44, Register 108, C1-C5)
    w 30 00 2c
    w 30 6C 7E DD 00 00 C0 92 00 00 00 00 00 00 3E DE 00 00 00 00 00 00
    #

    #
    # Second, switch buffers and write again to Buffer A’s registers:
    w 30 00 2c 05
    #
    # BIQUAD A, (Page 44, Register 108, C1-C5)
    w 30 00 2c
    w 30 6C 7E DD 00 00 C0 92 00 00 00 00 00 00 3E DE 00 00 00 00 00 00
    #
    #
    #
    ############################################### #

    # 3/20/13 freq response select, custom
    ###############################################
    #
    # Select Page 46 (0x2E)
    #
    w 30 00 2E
    #
    ###############################################
    # mono_mux_1 (DSP_D), coef=65 (0x41), I2C page=46 (0x2E), I2C reg start=28 (0x1C) and 29, 30, 31(reserved)
    # Custom is 1= 00 00 01  Wide is 2= 00 00 02, Voice is 3= 00 00 03, Hearing assist is 4= 00 00 04
    ###############################################
    #
    # Write to Buffer A registers:
    #
    # DAC coef(Page 46, write Register 28,29,30,31,  C65)
    #
    w 30 1C 00 00 01 00
    #
    # switch DAC buffers (on Page 44 (0x2C) register 1 (use 00000101 =0x05 for DAC=buff A and I2C DAC control=buff B) and
    # write again to buffer A #registers
    #
    w 30 00 2C 05
    #
    # add wait for flag command
    #
    f 30 01 xxxxx1x0
    #
    # DAC coef(Page 46, write Register 28,29,30,31,  C65)
    #
    w 30 1C 00 00 01 00
    #####################

    # 3/20/13 freq response select, wide
    ###############################################
    #
    # Select Page 46 (0x2E)
    #
    w 30 00 2E
    #
    ###############################################
    # mono_mux_1 (DSP_D), coef=65 (0x41), I2C page=46 (0x2E), I2C reg start=28 (0x1C) and 29, 30, 31(reserved)
    # Custom is 1= 00 00 01  Wide is 2= 00 00 02, Voice is 3= 00 00 03, Hearing assist is 4= 00 00 04
    ###############################################
    #
    # Write to Buffer A registers:
    #
    # DAC coef(Page 46, write Register 28,29,30,31,  C65)
    #
    w 30 1C 00 00 02 00
    #
    # switch DAC buffers (on Page 44 (0x2C) register 1 (use 00000101 =0x05 for DAC=buff A and I2C DAC control=buff B) and
    # write again to buffer A #registers
    #
    w 30 00 2C 05
    #
    # add wait for flag command
    #
    f 30 01 xxxxx1x0
    #
    # DAC coef(Page 46, write Register 28,29,30,31,  C65)
    #
    w 30 1C 00 00 02 00
    #####################

    # 4/4/13 DRC select, linear
    ###############################################
    #
    # Select Page 44 (0x2C)
    #
    w 30 00 2C
    #
    ###############################################
    # mono_mux_two to one_2 (DSP_D), coef=18 (0x12), I2C page=44 (0x2C), I2C reg start=80 (0x50) and 81, 82, 83(reserved)
    # DRC compression is 1= 00 00 01  DRC linear is -1= FF FF FF
    ###############################################
    #
    # Write to Buffer A:
    #
    # DAC coef(Page 44, Register 80,81,82,83,  C18)
    #
    w 30 50 FF FF FF 00
    #
    #
    # switch DAC buffers (on Page 44 (0x2C) register 1 (use 00000101 =0x05 for DAC=buff A and I2C DAC control=buff B) and
    # write again to buffer A registers
    #
    w 30 00 2C 05
    #
    # add delay of 15 msec
    #
    d 15
    #
    # DAC coef(Page 44, Register 80,81,82,83,  C18)
    #
    w 30 50 FF FF FF 00

    # 3/21/13 Biquad Low Pass fc=all pass 1st order butterworth
    ###############################################
    #
    # Select Page 0
    ###     w 30 00 00
    #
    # PRB_P2 selected
    ###     w 30 3C 02
    #
    # Select Page 44, Enable Adaptive filtering for DAC
    ###     w 30 00 2c 04
    # ###############################################
    # biqual_2, DSP coeff=30 (0x1E), I2C page=45 (0x2D), I2C reg=8 (0x8), length=5 (bo,b1,b2,a0,a2)
    # B0=0x7FFF00
    # B1=0x000000
    # B2=0x000000
    # A1=0x000000
    # A2=0x000000
    #
    #
    ###############################################
    #
    # select page and write to Buffer A’s registers:
    #
    # BIQUAD A, (Page 45, Register 8, C1-C5)
    w 30 00 2D
    w 30 08 7F FF 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
    #

    #
    # Second, switch buffers and write again to Buffer A’s registers:
    w 30 00 2c 05
    #
    # BIQUAD A, (Page 45, Register 8, C1-C5)
    w 30 00 2D
    w 30 08 7F FF 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
    #
    #
    #
    ############################################### #

    Thanks,

    Tom

  • Hi Tom,

     

    Please try my files, which I sent via email yesterday, with your prototype board.

    Try them with TI 3070EVM if this issue is still there.

     

    The process should work well in EVM (I tried it) and you can dump all the registers values.

    Compare the ones(register values) in your prototype board with ones in EVM. 

    Finally, you could find what's wrong with your settings.

    Thanks.

    Best wishes.

    ************************************************************* 

     Austin HE   Application Engineer   TEXAS INSTRUMENTS 

    *************************************************************

  • Early on, you requested that I use PPS to see if the problem occurs similar to my prototype. Here are the details.

    My PPS builds successfully. The "default" build comes up with the mux radio buttons as shown in PPS and the mono_mux_1 builds with it's mux select =1. Biquad_1 is a low pass filter (its default build is an all pass filter) and biquad_75 is a high pass filter (default is also built as an all pass). Both of these biquads are meant to be loaded on the fly with each having ten different script files to create different HP/LP responses. This is when the mono_mux_1 mux select =1. If the mono_mux_1 selection is 2, 3 or 4, the other biquads (incident =2) are switched in the signal path. They are meant to pass a "preset" and fixed (not adaptive) frequecy response.

    I still have incorrect operation when I am in PPS. The problem occurs when mono_mux_1= 1 and I load my script file to go to, say a LP filter at 315Hz cut off freq. I then load my "all pass" filter to return to a flat response and the response stays at the previous 315Hz filter response. This is the general mode of incorrect operation. Lots of other combinations do not work in the same way including the mux used to select the DRCs. Please note that my script files for switching all my muxes are also written to be adaptive. It seems to me that I have incorrectly implemented the adaptive mode in my script files. Please see my previous attached script files and comment.

    Note that I did unzip you PPS file and tried it with my EVM. Since I have my EVM interfaced with a DIR9001 clock that is different than the USB clock it did not work. I did not spend the time undo my modifications or change the clock settings after learning the above results.