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PCM 1801 Communication/Setup Issues

Other Parts Discussed in Thread: PCM1801, PLL1705

Hello everyone,

I ran into some issues while working with the PCM1801 16 bit Stereo ADC (Datasheet: http://www.ti.com/lit/ds/symlink/pcm1801.pdf )

The chip was set up  as show on page 17 of the datasheet. The main differences are listed below.
Differences 
- The SCKI (System Clock)  is being provided by Texas Instruments PLL1705 Dual Multiclock Generator to provide the ~16.9Mhz clock needed for the PCM1801 (44.1Khz Sampling rate)
- LRCK (Left Right Clock) and BCK are provided by a Stellaris Launchpad MCU with a M4F Processor. System Clock is currently not fed into this device.
- FMT is currently tied to Ground (MSB-First Left Justified Mode)
- BYPASS is currently tied to High (High Pass Filter Disabled)
 

Current State
Currently with this setup  we are getting some weird noise out of the Dout of the ADC. The noise seems to have some kind of pattern and has a peak voltage of around 100mV.
We have tested the chip on both breadboard and PCB (Just in case the breadboard might have been the issue)

What We Know
-We know that the problem  M I G H T  be due to some clock synchronization issue due to the fact that our MCU is not generating the SCKI. (Datasheet pg 15 [bottom])
-There could also be the issue that we did not fabricate the circuit correctly or potentially forgotten something
- We don't think the chip is broken but there is always a possibility. However we have used two different chips with similar results.

 What We Need
- If someone with experience with this chip can inform us what we might be doing wrong that would be great.
- If this is a clock sync issue and someone knows how we can fix this problem that could be good
     + Potential problems of feeding SCKI into the MCU could be things like aliasing causing problems due to the limitations of the MCU

Ill answer any questions anyone might have and thanks ahead of time for any assistance!

Regards,
  JS 

  • Hi Joseph,

     

    Thank you for posting your question on E2E. We will look into this and let you know what we can find as soon as possible.

     

    Regard,

     

    Brian Wang 

  • Hi Joseph,

     

    I have some questions for you:

    Could you determine the frequency of the pattern in the noise you are observing?

    What do you have connected at the load of the PCM1801?

    Could you determine whether your SCKI and LRCK are in sync by 6 bit clocks as suggested in the datasheet?

    When you power the PCM1801, are your system clock, bit clock, and word clock supplied at the same time?

     

    Also, could you provide me some screen shots at a few parts of your circuit:

    1. The clock output of the PLL1705 you are feeding into the SCKI of PCM1801

    2. The LRCK and BIT clock from the Stellaris

    3. Dout of the PCM1801

     

    That's a long list of items, but it should help narrow down where the problem may be.

     

    Regards,

     

    Brian Wang