Hello,
I would want to know how can i set the sampling frequency at 24KHz or 32 KHz. I have an example from a code working at 48KHz:
/* Configure AIC3204 */
AIC3204_rset( 0, 0x00 );
// Select page 0
AIC3204_rset( 1, 0x01 );
// Reset codec
AIC3204_rset( 0, 0x01 );
// Point to page 1
AIC3204_rset( 1, 0x08 );
// Disable crude AVDD generation from DVDD
AIC3204_rset( 2, 0x00 );
// Enable Analog Blocks
// PLL and Clocks config and Power Up
AIC3204_rset( 0, 0x00 );
// Select page 0
AIC3204_rset( 27, 0x00 );
// BCLK and WCLK is set as i/p to AIC3204(Slave)
AIC3204_rset( 4, 0x07 );
// PLL setting: PLLCLK <- BCLK and CODEC_CLKIN <-PLL CLK
//AIC3204_rset( 6, 0x08 ); // PLL setting: J=8
AIC3204_rset( 6, 0x20 );
// PLL setting: J=32
AIC3204_rset( 7, 0 );
// PLL setting: HI_BYTE(D = 0)
AIC3204_rset( 8, 0 );
// PLL setting: LO_BYTE(D) = 0
// For 48 KHz sampling
AIC3204_rset( 5, 0x92 );
// PLL setting: Power up PLL, P=1 and R=2
AIC3204_rset( 13, 0x00 );
// Hi_Byte(DOSR) for DOSR = 128 decimal or 0x0080 DAC oversamppling
AIC3204_rset( 14, 0x80 );
// Lo_Byte(DOSR) for DOSR = 128 decimal or 0x0080
AIC3204_rset( 20, 0x80 );
// AOSR for AOSR = 128 decimal or 0x0080 for decimation filters 1 to 6
AIC3204_rset( 11, 0x88 );
// Power up NDAC and set NDAC value to 8
AIC3204_rset( 12, 0x82 );
// Power up MDAC and set MDAC value to 2
AIC3204_rset( 18, 0x88 );
// Power up NADC and set NADC value to 8
AIC3204_rset( 19, 0x82 );
// Power up MADC and set MADC value to 2
I have read documentation about AIC3204, and I thought thay by changing values of MADC and NADC, I could change the sampling frequency. However, It is not the case.
I would want to know which register should I change, and with which values in order to set the sampling frequency at 24 KHz for example.
Thank you!!
