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TAS5611A overcurrent limit protection

Dirk Seidel1
Prodigy 40 points
Other Parts Discussed in Thread: TAS5611A

Hello,

I have a question to the overcurrent limit protection on page 10 in the datasheet: http://www.ti.com/lit/ds/symlink/tas5611a.pdf.

1. What is the difference between IOC and IOC_LATCH ? I have found:

"In situations other than overload and overtemperature error (OTE), the device automatically recovers when the fault condition has been removed [...]"(page 18)

It means to me to that an Overcurrent Error stays even if the Overcurrent is gone. I have to reset the device. In this context IOC_LATCH is understandable. But what about  IOC?

2. What is the overload protection counter with 2,6 ms ?

3. I want to use the TAS5611A in 2xBTL mode and I use only one channel. Can I connect the unused input direct to ground ?

 

Thank you for your help.

  • 0
    TI__Mastermind 37045 points

    Hi Dirk,

    Ioc is also known as cycle-by-cycle (CBC) over current protection. CBC means that the OC protected MOSFET will remain turned off within the PWM cycle where the OC event happened. At the first following rising edge PWM the MOSFET will be turned on again. The OLP counter keeps count of the number of OC event. The counter decreases on every n’th non-OC PWM cycle, and increases on every m’th OC cycle. When counter reached 1000 count (or 2.6mS minimum based on PWM freq =384KHz)  the over load protection (OLP) will kick in and shut down the affected channel.

     

    Below is the recommendation for single BTL channel operation. The external LC filter associated with the unused channel can be removed to reduce system cost.

    • Input Configuration - Tie both of the unused channel’s analog audio inputs to the center point of a 22.1K+22.1K resistor divider between GVDD (12V) and GND.  This will force the unused outputs to a low voltage with minimal switching activity.  Bypass the inputs to ground with a 100nF ceramic capacitor close to the input.

     

    • Output Configuration - Remove the LC filter components from the unused channel outputs. However, leave the bootstrap capacitors connected. Do not connect any other components to the Out traces, and make the Out traces as short as possible. 

     

    • Mode Pins – Configure M3-M2-M1 = 010 mode, using AB in BTL mode and disabling channel CD.

     

    reg,

    Paul Chen

    Applications Engineer

    Dallas TX USA 

  • 0 in reply to user5276421
    Prodigy 40 points

    Hello,

    thank you very much for your answer, it was very helpful.

    I have to admit, however, that after reading your explanation I am a little bit confused about the I_OC_LATCH. Does it mean that after a single OC event, the chip goes into shut down mode?

    Thank you in advance for your answer.

  • 0 in reply to user5276421
    Prodigy 30 points

    Hello,

    I have another question to the unused channel. I`m not sure, what I should do, with the supply pins. 

    I have connected PVDD_C and PVDD_D to VCC, with 100nF to GND. And I have connected GVDD_C and GVDD_D to 12V with 100nF to GND.

    I have removed the big electrolyt capacitors, because there flowing no high current.

    But can I the supply pins also leave open?

    Or is it correct what I have done?