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9211 EVM Board SPDIF issue..........please give me a favor.... thanks...

Other Parts Discussed in Thread: PCM9211EVM-U, PCM9211

Dear all:

 

I used the TI PCM9211EVM-U board to do  the digital SPDIF  signal input and output experiment.

The test environment as below:

(1) I used the dvd player  to produce the standard optical output  SPDIF signal.

(2) To connect the PCM 9211EVM board through optical fiber line to J4 of the PCM 9211.

(3) To use the TI CodecControl.exe software as the simulation interface.

(4) To select the appropriate choice item in CodecControl.exe.

(5) To use the initial description ( PCM9211_Init.txt ) on evm board 

as follow: (  In fact, this script is initial description of the 9211EVM Borad:PCM9211_Init.txt   )

#System RST Control w 80 40 00 w 80 40 33 w 80 40 C0

#XTI Source, Clock (SCK/BCK/LRCK) Frequency Setting # XTI CLK source 12.288 and BCK 3.072, LRCK 48k = XTI/512 w 80 31 1A w 80 33 22 w 80 20 00 w 80 24 00

#ADC clock source is chosen by REG42 w 80 26 81

#XTI Source, Secondary Bit/LR Clock (SBCK/SLRCK) Frequency Setting w 80 33 22

#REG. 21h, DIR Receivable Incoming Biphase's Sampling Frequency Range Setting w 80 21 00

#REG. 22h, DIR CLKSTP and VOUT delay w 80 22 01

#REG. 23h, DIR OCS start up wait time and Process for Parity Error Detection and ERROR Release Wait Time Setting w 80 23 04

# REG 27h DIR Acceptable fs Range Setting & Mask w 80 27 00

# REG 2Fh, DIR Output Data Format, 24bit I2S mode w 80 2F 04

# REG. 30h, DIR Recovered System Clock (SCK) Ratio Setting w 80 30 02

#REG. 32h, DIR Source, Secondary Bit/LR Clock (SBCK/SLRCK) Frequency Setting w 80 32 22

#REG 34h DIR Input Biphase Signal Source Select and RXIN01 Coaxial Amplifier

#--PWR down amplifier, Select RXIN2

w 80 34 C2

#--PWR up amplifier, select RXIN0

w 80 34 00

#--PWR up amplifier, select RXIN1

#w 80 34 01

 

w 80 37 00

#REG 38h rd DIR Fs

r 80 38 01

 

w 80 6A 00

#REG. 6Bh, Main Output Port (SCKO/BCK/LRCK/DOUT) Source Setting w 80 6B 11

#REG. 6Dh, MPIO_B & Main Output Port Hi-Z Control w 80 6D 00

# read back all registers to ensure GUI integrity r 80 20 5E

 

 

Unfortunately....

 

There is no voice comes from the speaker.

But I can still measure the output signal as follow:

 

(a) MPO0

(B) I2S signal (MCLK, DIN , BCLK, but no DOUT signal)

 

Would someone please tell me how to figure out problem and what to do step by step.

 

Thank you very much

Ray

 

 

  • Hi, Ray,

    Is your source material copy protected? This might prevent the playback.

    Check TXCS2 and RXCS2 in the d/s for more info.

    -d2

  • Hi Dapkus,

    I need PCM9211 to convert my digital audio data into I2S.
    SETUP :-

    using PCM9211EVM-U board
    giving 1KHz digital unbal. signal. via APx515 on RXIN0
    checking output on P7 of board but there is no Dout.
    using "RXIN0 in MainOutput.txt" script

    "Is your source material copy protected? This might prevent the playback.

    Check TXCS2 and RXCS2 in the d/s for more info."

    i go through the d/s but its doesn't mention what types of changes it need, is same problem is with me too if yes then which type of changes it need
    or my scripts had any issue.

    #**************************************
    #this script is for SPDIF-->RXIN0-->DIR-->MainOutput, Record sound from SPDIF to PC through TAS1020
    
    #So
    #1, Chose RXIN0 to DIR
    #2, Active DIR
    #3, chose DIR output as Mainoutput's source.
    
    #Also HW modification
    #1, Flying to High Level(3.3V) to make sure U7's output is Hi-Z
    #or 2, TAS1020 output logic high on P1.2 I2S enable signal. 
    #**************************************
    
    
    #System RST Control
    #w 80 40 00
    w 80 40 33
    w 80 40 C0
    
    #XTI Source, Clock (SCK/BCK/LRCK) Frequency Setting
    # XTI CLK source 12.288 and BCK 3.072, LRCK 48k = XTI/512
    w 80 31 1A
    w 80 33 22
    w 80 20 00
    w 80 24 00
    #ADC clock source is chosen by REG42
    w 80 26 81
    
    #XTI Source, Secondary Bit/LR Clock (SBCK/SLRCK) Frequency Setting
    w 80 33 22
    
    
    #*********************************************************
    #-------------------------------Start DIR settings---------------------------------------
    #REG. 21h, DIR Receivable Incoming Biphase's Sampling Frequency Range Setting
    w 80 21 00
    
    #REG. 22h, DIR CLKSTP and VOUT delay
    w 80 22 01
    
    #REG. 23h, DIR OCS start up wait time and Process for Parity Error Detection and ERROR Release Wait Time Setting
    w 80 23 04
    
    # REG 27h DIR Acceptable fs Range Setting & Mask
    w 80 27 00
    
    # REG 2Fh, DIR Output Data Format, 24bit I2S mode
    w 80 2F 04
    
    # REG. 30h, DIR Recovered System Clock (SCK) Ratio Setting
    w 80 30 02
    
    #REG. 32h, DIR Source, Secondary Bit/LR Clock (SBCK/SLRCK) Frequency Setting
    w 80 32 22
    
    #REG 34h DIR Input Biphase Signal Source Select and RXIN01 Coaxial Amplifier
    #--PWR down amplifier, Select RXIN2
    #w 80 34 C0
    #--PWR up amplifier, select RXIN0
    w 80 34 00
    #--PWR up amplifier, select RXIN1
    #w 80 34 01
    
    #REG. 37h, Port Sampling Frequency Calculator Measurement Target Setting, Cal and DIR Fs
    w 80 37 00
    #REG 38h rd DIR Fs
    r 80 38 01
    #***********************************************************
    #------------------------------------ End DIR settings------------------------------------------
    
    
    #***********************************************************
    #---------------------------------Start  MainOutput Settings--------------------------------------
    #MainOutput
    #REG. 6Ah, Main Output & AUXOUT Port Control
    w 80 6A 00
                                                                                                                                                                                   
    #REG. 6Bh, Main Output Port (SCKO/BCK/LRCK/DOUT) Source Setting
    w 80 6B 11
    
    #REG. 6Dh, MPIO_B & Main Output Port Hi-Z Control
    w 80 6D 00
    
    w 80 63 00
    w 80 5A 00
    
    #***********************************************************
    #------------------------------------ End MainOutput settings------------------------------------------


    attaching the scripts kindly have a look.

    waiting for some positive replies ASAP

    Regards:-
    Sonu Verma