Hi,
Looking at using the Silabs, Si5351 to get a flexible clock generator for a PCM1791A DAC. (24.576 MHz + 22.5792 MHz -> 256fS)
Using this clock generator, we'll get 100ps (max) jitter.
The other optionw would be to use a small FPGA with a fractional divider. That would give us 230ps p-p (max).
Not knowing this DAC and can't find any info in the datasheet, I can't judge whether these specs are sufficient. (let's say in comparsion with a pure silicon clock oscillator).
Would be great to hear if someone has been digging deep in this subject. I mean in the end it's only a true audiophile-ear that could hear the difference :-)
best, David
