I believe there is an error in the figure 27 schematic for a typical application of the TPA3116D" used in 2.1 master/slave mode.
U2 is in slave mode, the sync output from U1 fed via R73, 10k to the sync input with a 1nF capacitor C41 as a slew rate limiter. This reduces the swing on the sync input to around 1V peak/peak which in insufficient to sync U2.
In order to get U2 to sync I suggest C41 is reduced to 100pF to allow a full swing and the correct slaving of U2 to sync the two amplifiers.