TI,
Investigating the TAS5760M as a candidate part in a new design. Unfortunately, the I2S source for this amplifier only outputs SCLK, LRCK, and SDIN; but no master clock MCLK. It also has a modest limit of 6.2 MHz for SCLK and 96KHz for LRCK.
I do not believe that the TAS5760 can generate MCLK internally. As such, can you point me towards a simple solution to external MCLK generation besides a PLL?
Thanks,
Jay