Because of the Thanksgiving holiday in the U.S., TI E2E™ design support forum responses may be delayed from November 25 through December 2. Thank you for your patience.

  • State Resolved
  • Locked Locked
  • Replies 4 replies
  • Subscribers 30 subscribers
  • Views 476 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

16 bit depth data issue in PCM9211

Sonu Verma
Intellectual 450 points
Other Parts Discussed in Thread: PCM9211, MSP430F5325

Hello All,

For a test m using PCM9211 as ADC in Slave mode controlling it using MSP430F5325, crystal on PCM9211 is 24.576MHz and communicating it via I2C, while m setting reg 48h of PCM for 24-bit I2S ,
its working fine but changing it to 
24-bit left-justified
24-bit right-justified or
16 bit right justified
data got corrupted, m not getting why this is happening....
and if my device is unable to set on 16-bit right justified, as it working on 24bit i2s mode, how it may affect my digital Audio,  is it become incompatible with several digital audio device working on 16 bit-depth or what so ever, m kinda new in audio field so m bit confused about this 16bit depth and 24 bit depth data. 
or having worked on 24bit I2S data is good enough.

one more thing i would like to ask
is 24bit I2S defines the bit depth of 24, or if not then what define the bit-depth
and as PCM9211 have 16-bit right justified data, so it will fulfil the criteria of 16bit depth data.
 
looking a possible positive suggestions , and feel free to ask any more info. about the test setup.

Sonu Verma

  • 0
    TI__Mastermind 28585 points

    How have you verified that the problem is with the output of the PCM9211 and not the configuration of the MSP430?

    If both sides are expecting the same standard, it should work fine. 

  • 0 in reply to Converter Apps
    Intellectual 450 points
    Hello Sir,

    m reading back reg values after writing,  during debugging on CCS v5.3 
    value of 48H changes respectively.
     
    Using ATS-2 for analyzing and generation of data.
    giving input 
    2 Channel analog balanced 
    Sine wave of 0dBu
    having frequency of 1KHz.

    Setting registers through I2C using MSP430F5325.

    working fine with this but
    I2C_Write(PCM9211_address,0x48,0x00); // 24-bit I2S format

    here m also clarify one thing m changing only reg 48h and other bits were rewriting same values.
    when this reg value changed to 0x03 for 16 bit right justified or any other below or
    24-bit left-justified 
    24-bit right-justified
    it won't working 

    Retrieved digital output ( 24bit I2S Format )
    digital balanced output is :
    bit depth is-> 24
    Voltage is 5.157Vpp
    Sample Rate-> 48.0128KHz.
    Ch. A -> 0.234dBFS
    Ch. B -> 0.428dBFS
    Retrieved digital output (16 bit right justified format )
    setting 48h on 0x03; 
    digital balanced output is :
    bit depth is-> 9
    voltage is 5.157Vpp
    sample rate-> 48.0128KHz.
    Ch. A -> -90.326dBFS
    Ch. B -> -90.326dBFS
    Here i would like to clarify one more thing, MSP430 it is just for configuring registers of PCM9211 via I2C.
    output of ADC is taken from MPO0 & MPO1 where MPO0 is passed through with some circuitry for making it balanced digital output then fedded to analyzer
    where as MPO1 is directly connected with BNC for feeding it on Analyzer.
    result remains the fail in case of bal. and unbal. digital signal 
    for more clarification attaching pics of ATS-2 with 24 bit and 16 bit selection on 48H, setting values on button clicks.




  • 0 in reply to Sonu Verma
    TI__Mastermind 28585 points

    OK, I thought you were using the I2S output. It looks like you are using the DIT. In this case you need to make sure that Register 61h, bits B1 and B0 match the bit format in Register 48h. Also, since we use the AP Sys 2722, I am not very familiar with the ATS-2. Does the AP require you to set the format for the Digital I/O or is it looking at the Channel Status bits? If it is looking at the CS bits, you would also have to set Registers 63-68h.

  • 0 in reply to Converter Apps
    Intellectual 450 points

    Hello Sir, 

    Its working fine now, thanks a ton for the great support... 
    sir if it is possible, would you please suggest me how to enhance the performance of device by correcting the SNR ratio and THD+N control of device....

    Regards:-
    Sonu Verma