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AIC 3107: MCLK is needed when codec clock is taken from BCLK?

Hello everybody!

For the project I am working on, the AIC3107 is used as slave and driven by the host with a clock of 11, 2896 MHz on pin BCLK. Register 102 of the AIC is setup to use pin BCLK as clock input and this clock is then given to the CLKDIV_IN to furnish a 44,1 KHz Fsref to the codec (Q=2 with 256 BCLKs per frame). The PLL is not used.

My question: What do I do with pin MCLK? Is it still used for something? Can it be fixed to GND or any other signal? If it is needed - e.g. for soft-stepping - can I supply another clock, e.g. an 8 MHz already available on the system? Or do I need to set MCLK to the same clock as BCLK?