As we know AIC3262 have 3 number of independent audio serial interface.
I have the following question,
1. If i connect GSM audio in ASI1 and bluetooth on ASI2, if i get the call from GSM can i bypass the signal to bluetooth internally on AIC3262?
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As we know AIC3262 have 3 number of independent audio serial interface.
I have the following question,
1. If i connect GSM audio in ASI1 and bluetooth on ASI2, if i get the call from GSM can i bypass the signal to bluetooth internally on AIC3262?
Hi, SANGILI,
I have asked my colleague to comment on your question.
-d2
Hi Sangili,
This depends on the signal you are trying to bypass. Are you trying to bypass just the digital audio signal or the clocks as well?
If it is the clocks as well, how are your clocks setup (which device is the master/slave)?
If it is just the audio signal (both devices are running on the same clocks), it is very simple. If there is one master and one slave, it is still possible, but it is a little more complex.
Regards,
~John
Hi John,
Actually my aim is transfer the GSM audio signal from ASI#3 to bluethooth ASI#2 and talking call from BT headset.
My GSM PCM works only in master mode it will not support slave mode, Spec is,
Master mode only
Bit rate single clock mode at 1 MHz
16 bits word, 13 bits data, MSB first only
Data sampling on falling edge
Linear Law only (no compression law)
Long Frame Synchronization only
Hence ASI#3 should be in master mode.
For bypass the audio from ASI#3 to ASI#1, ASI#1 do be configure as master or slave? and as you said which option is best for this scenario just audio signal only or including the clock.?, because i'm not expert in AIC3262.
I need your suggestion and help regarding this.
Find the detailed picture,
Thanks Mr.john
Hi Sangili,
Well, it depends on what else is possible in your system (related to audio). For instance, you could tie the clocks together externally from the AIC3262 for the GSM and Bluetooth and in this situation have just the audio data go through the AIC3262 using the pin-to-pin loopback in the appropriate register on the AIC3262. However, this could cause other problems if another system state requires the AIC3262 device as a master to the bluetooth and then the clocks may conflict from the GSM.
The best way to do this may be to have the AIC3262 device in slave mode with the GSM clocks as the master clocks and then you would route the signals through the ASI1 block - but not through the miniDSP - and then back through the ASI2 block (numbers based on diagram, you switched it in your explanation).
For more information, look at page 120 on the Applications Reference Guide. This breaks down how the signals of the ASIs are handled internally and what registers control them in a simple diagram. Here:http://www.ti.com/lit/ug/slau309/slau309.pdf
Have you also verified that the bluetooth block will be able to handle the PCM specs?
Let me know if anything is unclear.
Regards,
~John
Hi Mr.John
Yeah you are right.
Now i'm checking the bypass procedure in AIC3262 EVM. By this i can understand how bypassing working with audio signal alone and audio signal with clocks.
I did the following procedure in EVM for bypassing but i made some mistake so not able to expected the result
1. Configured the EVM (ASI#1) in Calss-D play pack from example configuration by Audio control software
2. Configured the ASI#2 for Headphone and connected the clock pins from ASI1 clocks so its operating in common clock.
3. Modified the Book0_page4_Reg23 to ASI1 to ASI2 loopbacking , While i'm playing i'm unable to hear the music from Headphone.
If i bypass the signal from AIC1 to AIC2 by connecting the jumper physically i can hear the songs from headphone playing from PC via ASI1
What are other changes i've to do for bypassing function in EVM. or tell me any idea for bypass checking function in EVM board
I've attached the script file for ASI2 HP function
######################################################################################### # Audio Serial Interface #2 to Stereo DAC to Headphone Output # AVDDx_18, HVDD_18, CPVDD_18 = 1.8V; IOVDD, AVDD3_33, RECVDD_33 = 3.3V # SLVDD, SRVDD, SPK_V = 5V, DVdd = 1.8V # MCLK = 12.288, Fs = 48kHz # PLL Disabled, DOSR = 128, PTM_P3 # CM = 0.9 # Audio Serial Interface #2 signals routed to DIN2 (DIN), BCLK2 (BCLK), DOUT2 (DOUT), # WCLK2 (WCLK) - Codec ASI#2 is Slave ######################################################################################### ######################################################################################### # Codec Software Reset ######################################################################################### w 30 00 00 # Initialize to Page 0 w 30 7f 00 # Initialize to Book 0 w 30 01 01 # Initialize the device through software reset d 1 # Delay 1 millisecond ######################################################################################### # Power and Analog Configuration ######################################################################################### w 30 00 01 # Select Page 1 w 30 01 00 # Disable weak AVDD to DVDD connection, make analog supplies available w 30 7a 01 # REF charging time = 40ms w 30 22 3e # 8/8 CP sizing (Setup A) w 30 21 28 # CP divider = 4, 500kHz, Runs off 8MHz oscillator w 30 23 10 # Charge Pump to power up on Ground-Centered Headphone Power-up w 30 08 00 # Full chip CM = 0.9V w 30 03 00 # PTM_P3, High Performance w 30 04 00 # PTM_P3, High Performance ######################################################################################### # Clock configuration # MCLK = 12.288 MHz, BCLK = 3.072 MHz, WCLK = 48 kHz (slave) ######################################################################################### w 30 00 00 # Select Page 0 w 30 04 00 # Set DAC_CLKIN as MCLK1 -- default not mandatory to program w 30 0b 81 # NDAC = 1 w 30 0c 82 # MDAC = 2 w 30 0d 00 80 # Program the OSR of DAC to 128 to get # DAC_FS = DAC_MOD_CLK / DOSR = 6.144MHz / 128 = 48kHz ######################################################################################### # Audio Serial Interface Routing Configuration - Audio Serial Interface #2 # ASI #2 connected to BCLK2, WCLK2, DIN2, and DOUT2 pins ######################################################################################### w 30 00 04 # Select Page 4 w 30 11 00 # Audio Serial Interface #2 = I2S mode, 16-bit w 30 1a 00 # For Audio Serial Interface #1, # Select BCLK2 as BCLK input and WCLK2 as WCLK input w 30 17 01 # Route ADC data to Audio Serial Interface #2 w 30 18 50 # ASI#2 Left Channel data sent to Left Channel DAC, # ASI#2 Right channel data sent to Right Channel DAC w 30 45 04 # Select WCLK2 pin as WCLK for Audio Serial Interface #2 w 30 46 04 # Select BCLK2 pin as BCLK for Audio Serial Interface #2 w 30 47 22 # Select DOUT2 pin as DOUT for Audio Serial Interface #2 w 30 48 20 # Select DIN2 pin as DIN for Audio Serial Interface #2 w 30 76 16 # Only ASI#2 Routed to DAC miniDSP Data Input 1 ######################################################################################### # Signal Processing Settings ######################################################################################### w 30 00 00 # Select Page 0 w 30 3c 01 # Set the DAC Mode to PRB_P1 ######################################################################################### # Output Channel Configuration ######################################################################################### w 30 00 00 # Select Page 0 w 30 3f c0 # Power up the Left and Right DAC Channels w 30 40 00 # Unmute the DAC digital volume control w 30 00 01 # Select Page 1 w 30 1f 80 # Headphone in Ground-centered Mode, HPL Gain=0dB w 30 20 80 # HPR To have same gain as HPL, set to 0dB w 30 09 00 # HP Sizing = 100% w 30 1b 33 # Enable DAC to HPL/R and power-up HPL/R
Thanks Mr.John
Hi Sangili,
I'm glad to hear you are understanding how the bypass works. The diagram on page 120 is very helpful!
Which physical jumper did you connect to get this to work? What does this jumper do?
Instead of modifying Book 0 Page 4 Register 23, try modifying the Book 0 Page 4 Register 31 for loopback.
From page 264 of the applications reference guide:
D1-D0 R/W 00 01: DOUT2 from ASI1 Data Input (Pin-to-Pin Loopback)
Unfortunately, I don't have the EVM on hand to double check this solution, please let me know if this works.
Regards,
~John
Hi John,
I tried your point. modify the B0_P4_R31 to D1-D0 R/W 00 01: DOUT2 from ASI1 Data Input and i can get the signal at ASI#2's DOUT2 jumper (W31). so bypass working here
But before this testing i tried other procedure also. that is modified the B0_P4_R23 to b011: ASI2 digital audio output data is sourced from ASI2 digital input data (ASI2-to-ASI1 loopback) but i am not able get the data signal from W31, if i connect the BCLK, MCLK of ASI2 with ASI1 physically (W28--> W32 and W26-->W30) i can get the data signal from W31. If i disconnect the clock pin from ASI2 data also not coming.
In case of modified B0_P4_R31 i can get the bypassing signal even i'm not connect clock physically.
What is the difference between B0_P4_R23 (ASI2-to-ASI1 loopback) and B0_P4_R31 (Pin-to-Pin Loopback)?
My real problem is i need to communicate 3 audio with AM335x processor but there is just 2 number of MCASP so i cant connect the audio like connected in OMAP with AIC3262
http://omappedia.org/images/9/9d/OMAP4_AIC3262_Audio_system_architecture.PNG
That's why i tried for bypassing method and planed for below mentioned architecture.
As per my diagram if we happen to have GSM call via Bluetooth headset, GSM data path as mentioned below
GSM_OU T--> ASI#3 --> ASI#2 --> MCASP1 -->MCASP0,
What's the correct method to proceed this one.
Kindly give me your valuable idea and suggestion regarding this.
Thanks.
Sangly
Hi Sangly,
Wonderful! The difference can be seen on page 120 of the Applications Reference Guide. One of the registers controls the MUX going directly to the DOUT2 pin (R31) and the other controls the MUX going into the ASI2 block (R23).
The issue with R23 was probably that the B0_P4_R26_D2 and B0_P4_R26_D5 were not set to 1. From the diagram these 2 bits control the path of the output of the WCLK2 and the BCLK2 pins from the ASI2 block.
I'm not sure I understand your last question -- The AIC3262 has the same functionality for bypassing from ASI1 to ASI2 (which you have done on the EVM) and from ASI3 to ASI2. Register B0_P0_R31 has a pin-to-pin loopback from DIN3 for DOUT2.
Regards,
~John
Thanks Mr.John.
Actually my problem is lacking of number of MACAP to be communicate with the audio devices.
Please find the below image
In OMAP part if we need to have voice call from Bluetooth headset in the sense the data path is mentioned in red line GSM_I2S <--> MCASP.2 <--> MCASP.1 <--> BT_I2S in this audio bypassing between MCASP's in done inside the OMAP.
In AM335x part if we need to have voice GSM call from Bluetooth headset in the sense our data path is
GSM_I2S <--> ASI3 <--> ASI2 <--> MCASP.1 <--> MCASP.0 <--> BT_I2S
in this procedure we need to perform two bypassing one is inside the CODEC (ASI3 <--> ASI2 ) another one is inside the AM335x processor (MCASP.1 <--> MCASP.0)
My target is need to have voice call from GSM to BT headset. and i hope you understand my problem now.
Hence what is the proper way to do this bypassing. kindly suggest us. if modification need between this devices in the sense kindly let me know we can change the physical connection.
Thanks
Sangly.
Hi Sangly,
Unfortunately, I'm still not sure I understand your question. I understand the application and the datapath - as discussed before, you can do bypassing within the AIC3262 CODEC for the change in data path from the OMAP to the AM335x.
If you need another audio device attached, you can use the ASI1 port on the AIC3262 using the bypass and use the same ASI2 to MCASP1 connection. In this configuration the AIC3262 acts almost as a MUX for the lack of a third MCASP. However, the clocks master/slave combination is important, as one device at the end of each I2S line must be a master and one a slave.
Regards,
~John