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AIC3254 ADC to DAC

Other Parts Discussed in Thread: TLV320AIC3254

I am troubleshooting a case of no output from DAC at HP.  Analog bypass (IN1L&R to HPL&R) works.   This is an AIC3254 design.

In this design, there is no connection to the external audio interface.  The AIC is used to process stereo mic input and mix the results with analog line in at the HP amplifier input.  My question is, do the "audio interface" (regs 0/27 through 0/30)still need to be setup, in this case as bus master, in order for the "audio interface" to pass data between the ADC and DAC?

Let me ask this another way.  The term "audio interface" is used in the docs to describe the ADC - DAC path and the external (e.g I2S) digital data bus.  Are they the same bus, and clocks required for ADC-DAC transfer?

All of the examples I have found involve connectivity to the external digital audio interface.  Should I expect the AIC to work without an external audio interface connection?

I've tried to ask the same basic question several different ways.  I've done a lot of poking around the system settings today, and it is frustrating that analog bypass works so well, but the mic path is absolutely dead once it enters the AIC (ie, the mics, mic bias, ground, wiring and board traces have been checked).  It seems like there is just no flow between the ADC and DAC.

I'm just checking that I'm not trying the impossible before I sink another day into it.

- Sam

  • Hi Sam,

    The AIC3254 will work without an external audio interface connection. There are clocks that can be setup using the internal PLL. For more information about this, please see page 74 of the Applications Reference Guide (http://www.ti.com/lit/an/slaa408a/slaa408a.pdf).

    However, I don't believe you need these clocks in your situation. The issue may be with routing. In particular, if the issue is the connection from the ADC to the DAC, you may want to look at this register:

    Page 0 Register 29  D4 R/W 0 Loopback control   1: Stereo ADC output is routed to Stereo DAC input

    For more information look at pages 104 to 107 of the guide I mentioned earlier, these pages contain the registers for the audio interface.

    Regards,

    ~John

     

  • Thanks, John.  I realize now this is something specific to the PurePath design I am using.  It is a modified copy from a different project.  I must have lost something in translation.  The audio path from mic to HP amplifier is identical in both designs and almost identical hardware connections, which is why I started with it.  Just subtle enough differences to overlook one.

    Is there a good document describing exactly what registers need to be setup in the System Settings file and what registers are setup by PurePath?  Is there a good reference for the miniDSP instruction set in the event I decide not use PurePath?

    For example, do I have to select the ADC input filter A, B, or C, or does PP do that when a decimation block (Dec4xIn) is part of the design?

    - Sam

  • Hi Sam,

    There is documentation of all the registers in the Applications Reference Guide as well as registers in the AIC3254 command file in the PPS directory. In reference, to your last question, page 38 describes how to setup the ADC.

    The instruction set for miniDSP is not published and TI recommends using PurePath for all miniDSP blocks.

    Regards,

    ~John

  • Thanks again, John.  I guess I am being blind-sided by the simplicity of the only working example I have here (someone else's PPS design running on different hardware).  The system settings file in that design has questions like mine from a previous developer.

    - Sam

  • Hi Sam,

    As John mentioned, you don't need an external audio interface. However, you would need to re-configure BCLK and WCLK as outputs and configure the clock tree. So check p0_r27, 29 and 30. I would assume you are using an interprocessor component to pass data from miniDSP_A to miniDSP_D.

    From hardware perspective, make sure BCLK, WCLK and DOUT pins are floating (or high impedance load) to avoid contention (otherwise audio will not work if, for example, DOUT is tied to ground).

    MCLK must be provided.

    Regards,

    J-

     

  • J:

    Thanks, you answered that question the way I should have asked it: Do the audio interface bit and word clocks need to run even though the external audio interface is not used?  The design engineer left all the interface pins floating, so I'll give it a try.

    Yes, PPS complained when I tried to tie the Dec4xIn to Int8xOut without going through a DA2DD component.  You are reminding me just how much of a learning experience this week has been.  The longer I go without solving the problem, the more I learn about the AIC and there is a lot to learn.  That's OK, but at some point I have to get some work done :)

    - Sam

  • Hi Sam,

    Great to hear that your understand the part better now!

    Let us know if you have any additional question on this topic, or create a new topic if you have a new question.

    Regards,

    J-

  • Hi J:

    "I would assume you are using an interprocessor component to pass data from miniDSP_A to miniDSP_D."

    Do I need to setup any register outside of those handled by PurePath in order to make this interprocessor connection between miniDSP_A and miniDSP_D?  Is reg 0/29 D5 for this?  Thanks.

  • Hi,

    No need to set up p0_r29_d4 or d5.

    Regards,

    J-

  • Thanks for such quick response.  I cannot believe.

    Do I need to do anything at all beside PPS to make DSP_A to DSP_D connection?

  • Hi,

    Assuming you have the typical AIC3254EVM-K board, the settings provided by PPS will allow analog input through DSP_A-DSP_D connection and to the headphone output. See SystemSettingsCode property of the framework for details on the actual settings that are written.

    So DSP_A-DSP_D connection requires the same settings as Dec4x to I2S_Out and I2S_In to Int8x.

    Regards,

    J-

  • Hi,

    Also, make sure jumpers and switches on both motherboard and daughtercard are the default settings. See EVM User Guide for details.

    Regards,

    J-

  • Hi J:

    I am using TLV320AIC3254EMV without "-K" or "-U" ,that is, without mother board.  Also, I realized that DSP_A_DSP_D which you were talking about and DSP_D_DSP_A which I am trying to use for digital-digital loopback may likely be different.  Is that right?

    For PPS, I selected "unknown" target board (is this OK?) and AIC3254APP8x4x framework.  And connected I2S_In to DSP_D_DSP_A to I2s_Out.  It's digital to digital loopback as this -

    Should it just work by the PPS generated register setting alone, if all other none register settings (jumpers, power, I2S interface) are correct?

    Thank you very much!

    HL

  • HL,

    It should work, however, you need to provide I2S and MCLK for it to work (see top of this forum thread).

    There is an Interprocessor component on PurePath to pass data between DSPs. This should work if using default EVM settings and clocking is correct. Also note that /RESET line of AIC3254EVM must be high for normal operation.

    There is a register setting to do internal I2SIn to I2SOut loopback without using PurePath at all, however it only works in I2S Slave Mode (BCLK/WCLK are inputs). If using  DSP_D_DSP_A component, you don't need to worry about master/slave.

    Regards,

    J-

     

  • Hi J,

    Thanks for this  very helpful response.  I have been checking the stuffs you just mentioned.

    All seems right except I need to further checking my setting for the MCU I2S, that's the reason I use digital loopback.  I have a few more questions for you:

    - I designed to make TLV320AIC3254 slave on I2S interface, so BCLK and WCLK are both kept as inputs as default setting.  In this case, do I still need to configure BDIV_CLKIN and BCLK N etc which is register 0/29 0/30 do?  Are they just for BCLK output?

    - In PurePath Studio there seems no place to enter any external clk source frequency value.   I wonder how PPS determines the multiplexer and divider parameters (P, J,D,R, MDAC, NDAC etc) just based on Fs that we entered or default?

    - I have tried using register 0/29 D5 to route I2S in to I2S out without success.  I did set the interface in slave mode with BCLK and WCLK both as inputs.  What else I need to do to route data this way?  Or it should just work as long as set that pin?

    Thanks!

    HL

  • HL,

    "- I designed to make TLV320AIC3254 slave on I2S interface, so BCLK and WCLK are both kept as inputs as default setting.  In this case, do I still need to configure BDIV_CLKIN and BCLK N etc which is register 0/29 0/30 do?  Are they just for BCLK output?"

    - Not necessary to configure these settings if WCLK/BCLK are set as inputs. See http://www.ti.com/lit/pdf/slaa404 for example typical scripts.

    "- In PurePath Studio there seems no place to enter any external clk source frequency value.   I wonder how PPS determines the multiplexer and divider parameters (P, J,D,R, MDAC, NDAC etc) just based on Fs that we entered or default?"

    - It just assumes you are using the EVM. For a custom environment, you need to manually change these values if different from EVM defaults.

    "- I have tried using register 0/29 D5 to route I2S in to I2S out without success.  I did set the interface in slave mode with BCLK and WCLK both as inputs.  What else I need to do to route data this way?  Or it should just work as long as set that pin?"

    It should work by just setting that bit. Check your I2C and check if the device is ACKing and try reading registers to make sure you're talking to the part.

    I would recommend getting an EVM-K to ease up debugging.

    Regards,

    J-

  • Hi J,

    Thanks for sending me another document.  We don't have this one and it seems have some additional info which might be helpful.

    - It just assumes you are using the EVM. For a custom environment, you need to manually change these values if different from EVM defaults.

    What's the EVM default source clk rate?  I only found the range from the documents we have. 

    My I2C work perfectly, write and read back.  The problem seems to likely come from my I2S configuration. Thanks for the suggestion on using the EVM-k board.  I may try that.

    HL

  • HL,

    Right click the AIC3254_8x4x framework and click Help. It will show the frequencies.

    Regards,

    J-

  • Hi J,

    Is that sample rate?

    I would like to know the default input clock (mclk) rate PPS based on so that I can match it to exclude possibly another parameter.

    I checked my code for setting up I2S on MCU side.  It should be correct.  Only thing that I am not sure is MCLK but I doubt that would completely stop the return path of the digital data (am I right?).  Data from MCU to AIC3254 seems all right, but AIC3254 to MCU direction just all 0s   But I did see the line was pulled after it is initialized by my code.

    For AIC3254 side of I2S config, I checked (saw the I2C read on the wire via analyzer) register 0/27 and 0/29 are left with default setting, (I2S, 16bit, BCLK in, WCLK in, default bit clock polarity = clock low on idle, right??) which matches with MCU side config.  Are these all needed for I2S config on AIC3254 side?

    Thanks,

    HL