This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AIC3204 SPI Hardware

Other Parts Discussed in Thread: TLV320AIC3204

Hello,

I want to use TLV320AIC3204 for beep generator only for the moment.

I have a hardware question. I use a µC connect only with SPI to the TLV320. I don't use I2S pin.

My output is on LOL pin.

SPI_select pin is High.

LDOin, IOvdd, and LDO_select pin are to 3.3V.

I try several initialisation but nothing works.

I have 1.7V on Avdd and Dvdd pin, but I have 0V on REF pin.

Can you see the problem ?

  • Hi Delmas,

    0V on REF pin is ok right after power-up before programming the registers of the part. The reference powers up when a block that need it is powered (ADC, DAC, etc).

    How about the /RESET pin? It should be set to IOVDD (3.3V) level for normal operation.

    I suggest to try to read from the device through SPI to check if the values obtained match the default values shown in the application reference guide of the device.

    Let me know if you have any other questions.

    Regards,

    J-

  • Hello,

    The RESET pin is OK (3.3V). I change my interface, and now I'm in I2C.

    Now, I have 0.9V on REF pin, and 1.65V on HP and LO output pin.

    But, I not able to got Beep with Beep generator.

    My problem is perhaps the clock :

    My configuration is:

    MCLK = 12 MHz (input on AIC3204)

    BCLK = 2.82 MHz (input on AIC3204)

    WCLK = 44.1 kHz (output of AIC3204).

    What is the simplest configuration for clock ?

    Regards.

  • Hi, Delmas,

    I believe the control s/w for the EVM contains a clock calculator. You can find it here.

    -d2

  • Hello,

    I'm in this configuration :

    MCLK = 12 MHz (input on AIC3204)

    BCLK = 3 MHz (output of AIC3204)

    WCLK = 46 kHz (output of AIC3204).

    But the beep don't work. My code is :

        //###############################################
        //# configure AIC3204
        //###############################################
        tlv_write_register(0x00, 0x00);    // Select page 0
        tlv_write_register(0x01, 0x01);    // Reset codec
            
        delay_ms(10);
        
        //###############################################
        //# Configure Processing Blocks
        //###############################################
        tlv_write_register(0x00, 0x00);    // Select Page 0
        tlv_write_register(0x3C, 0x19);    // PRB_P25 selected
        tlv_write_register(0x00, 0x2C);    // Select page 44
        tlv_write_register(0x01, 0x04);    // enable adaptive filtering
        
        delay_ms(10);
        
        //###############################################
        //# Configure Power Supplies
        //###############################################
        tlv_write_register(0x00, 0x01);    // Point to page 1
        tlv_write_register(0x02, 0x09);    // Power up AVDD LDO
        tlv_write_register(0x01, 0x08);    // Disable crude AVDD generation from DVDD
        tlv_write_register(0x02, 0x01);    // Enable Analog Blocks, use LDO power
        tlv_write_register(0x0A, 0x3B);    //
        tlv_write_register(0x3D, 0x00);    // ADC ????
        tlv_write_register(0x03, 0x00);    // DAC ????
        tlv_write_register(0x47, 0x32);    // Set the input power-up time to 3.1ms (for ADC)
        tlv_write_register(0x7B, 0x01);    // Set the REF charging time to 40ms
        
        delay_ms(10);
        
        //###############################################
        //# Configure Clock
        //###############################################
        tlv_write_register(0x00, 0x00);    // Select Page 0
        tlv_write_register(0x04, 0x00);    // codec_clkin = MCLK
        tlv_write_register(0x05, 0x00);    // PLL off
            
        tlv_write_register(0x1B, 0x0C);    // BCLK output & WCLK output
        tlv_write_register(0x0B, 0x81);    // NDAC = 1, divider powered on
        tlv_write_register(0x0C, 0x82); // MDAC = 2, divider powered on
        
        tlv_write_register(0x0D, 0x00); // DOSR = 128 (MSB)
        tlv_write_register(0x0E, 0x80);    // DOSR (LSB)
        tlv_write_register(0x12, 0x81); // NADC = 1, divider powered on
        tlv_write_register(0x13, 0x82); // MADC = 2, divider powered on
        tlv_write_register(0x14, 0x80);    // AOSR = 128
        
        tlv_write_register(0x1D, 0x04);    // BDIV_CLKIN = DAC_CLK
        tlv_write_register(0x1E, 0x84);    // BCLK N = 4, powered*/
           
        delay_ms(10);
                   
        //###############################################
        //# Configure DAC Channel
        //###############################################
        tlv_write_register(0x00, 0x01);    // Select Page 1
        tlv_write_register(0x03, 0xC0); // class D amplifier
        tlv_write_register(0x0E, 0x08); // Route LDAC/RDAC to LOL/LOR
        tlv_write_register(0x09, 0x3C); // Power up HPL/HPR and LOL/LOR drivers
        tlv_write_register(0x09, 0x3F); // Power up HPL/HPR and LOL/LOR drivers avec mixers
        delay_ms(10);
        tlv_write_register(0x12, 0x1D); // Unmute LOL/LOR driver, 29dB Gain
        tlv_write_register(0x13, 0x00);
        
        tlv_write_register(0x00, 0x00);    // Select Page 0
        tlv_write_register(0x41, 0x00);    // DAC => 0dB
        tlv_write_register(0x42, 0x00);
        tlv_write_register(0x3F, 0xD6); // Power up LDAC/RDAC
        delay_ms(10);
        tlv_write_register(0x40, 0x00);    // Unmute LDAC/RDAC

          
        //###############################################
        //# BEEP generator
        //###############################################
        tlv_write_register(0x00, 0x00);
        
        tlv_write_register(0x49, 0x01);     
        tlv_write_register(0x4A, 0x77);     
        tlv_write_register(0x4B, 0x00);    
        tlv_write_register(0x4C, 0x23);     
        tlv_write_register(0x4D, 0xFB);     
        tlv_write_register(0x4E, 0x7A);     
        tlv_write_register(0x4F, 0xD7);      
        
          tlv_write_register(0x47, 0x80);           
          tlv_write_register(0x48, 0x04);          
    }

    Can you see where is my problem ?

    Regards.

  • Delmas,

    See section 3.4 of http://www.ti.com/lit/pdf/slaa446.

    Regards,

    J-