Hi!
Datasheet (SLAS359 – DECEMBER 2001) on page 6 says:
"The PCMCLK can be tied directly to the 128-kHz or 2.048-MHz master clock (MCLK). The PCMSYN can be driven by an external source or derived from the master clock and used as an interrupt to the host controller."
But how can I enable mode "derived from the master clock and used as an interrupt to the host controller"? Are there some configuration bits?
And how host controller should process PCMCLK in this mode? Should it do first clock on interrupt, and then do eight clocks with data capture? Or it must do only eight clocks on interrupt?
Thx in advice.