Hi,
I'm having trouble to get the PCM5122 running in 3-wire-mode. The PLL should sync to BCLK.
Unfortunately I don't get the PLL to lock on the BLCK signal (48khz, BCLK=fs*64). I guess, I'm missing some register that must be configurued. I configured the PLL dividers and the PLL source register (Reg 13=0x10), but the PLL does not lock.
Any other registers that have to be set?
Best regards
Daniel
