This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TAS5760M Clock Error

Other Parts Discussed in Thread: TAS5760M

Hi,

We are concerned that when the clock error detects, an audible artifact may occur on the output.
If the clock errors detects, can TAS5760M mute the speaker amplifier automatically?
We believe that it can not mute it automatically as long as we read data sheet.
So, could you please tell us workaround regarding an audible artifact that caused by the clock error?
We believe that if SPK_FAULT pin becomes low, we should set SPK_SLEEP/ADR pin to high immediately before we set the SPK_SD pin to low.
Is our understanding correct?
In addition, is there a wait time to return from the clock error regarding SPK_FAULT pin?
We believe that it return immediately.
Could you please advise us about it?

Best Regards,
Kato

  • Hi, Kato-san,

    We will work with you on this issue.

    -d2

  • Hi Don-san,

    Thank you for your reply quickly.
    We are looking forward to your reply for this issue.

    Best Regards,
    Kato

  • Kato-san,

    Clock error is an unlatched error, which doesn't require SPK_SD to be toggled low or a fualt timeout in order to resume normal operation after the error occurs. TAS5760M resumes, sends SPK_FAULT high and clears the error flag immediately after the error condition is corrected. When a clock error is detected TAS5760M immediately shuts down the output (Not mute, there will be NO PWM output) and drives the fault pin low. It's the only non-latching error that makes SPK_FAULT pin go low (Fault monitoring). Please refer to page 33-34 of the TAS5760M datasheet.

    If the device is in SW mode SPK_SLEEP/ADR is I2C address pin and state shouldn't be change unless the user wants to change the I2C address. In HW mode SPK_SLEEP/ADR is speaker sleep pin and isn't needed to recover from a fault error.It can remain low.

    If the user wants to control when audio resumes after a clock error it can be done using SPK_SD or I2C control (I2C for SW mode).

  • Hi Damian-san,

    Thank you for your information.
    We evaluated clock errors using TAS5760M EVM.
    Since this device did not detect clock errors when we changed fs and the clock frequency, the pop noise did not occur.
    Do you have any ideas to avoid the pop noise when the clocks stop?

    Best Regards,
    Kato