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TAS5538/TAS5624A Sudden Power Loss

Other Parts Discussed in Thread: TAS5538, TAS5624A

Hi,

Could you please tell me the power-down sequence including the timing constraints in the case of sudden power loss if we use TAS5538 and TAS5624A connecting VALID pin of TAS5538 to RESET pin of TAS5624A?

Best Regards,
Kato

  • Hi Kato-san,

    The TAS5624A does not require a power-down sequence. The device remains fully operational as long as the gate-drive supply (GVDD_X) voltage and VDD voltage are above the undervoltage protection (UVP) voltage threshold (see the Electrical Characteristics table of this data sheet). Although not specifically required, it is a good practice to hold RESET low during power down, thus preventing audible artifacts including pops or clicks. The time constant of the ramp down depends on the value of the CSTART cap. Please refer to DS page 15 for more details.

    reg,

    Paul.

  • Hi Paul-san,

    Thank you for your information.
    If I have any questions from our customer, I will contact you again.

    Best Regards,
    Kato