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How to get start for SRC4392

Other Parts Discussed in Thread: SRC4392

Hi:

   Everyone , I have some trouble for SRC4392 code, pls help me

Now I can config the src4392 ,  the reading data is the same as the writting ,but the src4392 no audio output. at all. i input the audio form RX4,  output form porta,   i look for the manual on Ti net ,but no details manual for firmware to be found, How can get start for src4392 firmware?

Hi :

   What i said above maybe not very clearly.  my purpose as below:

   1.  the spdif audio is input from RX4 of SRC4392.

    2. the Right-justIfied format audio output form port A. output sampling frequencies is 192kHZ

   3. All internal clock are use the system clock  MCLK(frequency=24.576MHZ)

   4.  use SPI interface

   But the Port A not clock output , that is LRCKA  BCKA SDOUTA  these pin  no signal output, their level  are low. the pin RXCKO is still low level , no clock output.   What  i can do next step?


  my configuration as below for you reference

   1. for PortA: 24bit right-justfied ,Master mode ,  SRC output source
   
     for porta ctrl1:
   
    24bit right-justfied ,Master mode ,  SRC output source
    config_data = BIT(AFMT0) | BIT(AFMT1) | BIT(AFMT2) | BIT(AMS) | BIT(AOUTS0) | BIT(AOUTS1)

    BIT(AFMT0)  denote that set the AFMT0 bit  to 1. the other is the same.

   2. For porta ctrl2 : use default setting as below
       Set LRCKI to 192k
       set PORTA master clock source to MCLK
       config_data = 0;

   3.For portB: 24bit I2S MODE ,Slave mode ,  input mode, output mute
        config_data = BIT(BFMT0) | BIT(BMUTE);

   4  RX4 is the default channel,  MCLK clock, RXTBD enabled
       config_data = BIT(RXMUX1) | BIT(RXMUX0) |BIT(RXCLK);

    5 For RXCTL2
         RXCKOE enabled
          RXCKO CLOCK passthrough,disable divider
          receiver auto mute disable
         PLL2 out clock free run
         config_data = BIT(RXCKOE) | BIT(LOL);

   6    For RXPLLCFG1
          Set P=2  J=8  D=0;
          config_data = BIT(P1) | BIT(J3);

   7    For SRCCTL1
         SET SRC input source to DIR
         Set SRC reference clock source to MCLK
         SRC MUTE disabled
         SRC out attenuation tracking disabled
         config_data = BIT(SRCIS1)  ;     

   8    Finally,config power regster(adress 0x01) to enable desired units.
          config_data =  BIT(PDSRC) | BIT(PDRX) | BIT(PDPB) | BIT(PDPA);     


   I have look for the detailed information  for firmware  on TI .com ,but no important  found except the 4392 datasheet. i  want to know the steps for making the audio output form PortA. it's better have a document for src4392 firmware.  

Pls help

                                                               David Chen