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CC85xx IOVDD range

The datasheet / user manual does not specify allowed IOVDD range. Is it OK to mix 1.8V IOVDD for the audio interface with 3.3V IOVDD for the EHIF+GIO?

Can somebody shed more light on which VDD pins supply which circuit block? I'd like to take extra care about the VDD supplying XO and audio PLL, but I'm left to guessing which one it is...

  • Hi,

    I'm not sure what you mean by mixing the IOVDDs? If you mean that you want to supply some IOVDD pins with 1.8 V and some with 3.3 V this is not possible. We also suggest to use the same voltage level for all the VDD pins both IOVDD and AVDD etc. 

    Best regards,
    Johan

  • Hi Johan,

    The datasheet does not stipulate any such rules, but interestingly goes into details of which IOVDD pin serves which GIOs, leading me to believe one might operate the different IO banks at a different voltage. You're saying this is in fact not possible, so I'll better take your word for it.

    While on topic of GIOs - what is the default power-on state of GIOs with no assigned function in Configurator? Can I count on them staying in high impedance state? Any pullup/pulldown? I could only identify D+ & D- as having active pullup/down respectively, but sadly no info on any of the other pins. There doesn't seem to be a (official) way to control the GIOs via EHIF outside of test mode, although I guess with a write to an appropriate internal address, one would be able to configure them?

    Would you know which AVDD pin supplies the Xtal and (audio) PLL - I guess it's either p20 or p23. I'd like to take extra care there to prevent low frequency modulation caused by PA load step transients.

    Regards, Dominik