Hi,
Although when the dir is unlocked, the adc output is automatically routed to the main output port, could you please tell us the time between a dir error detection and an error flag output?
Best Regards,
Kato
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Hi,
Although when the dir is unlocked, the adc output is automatically routed to the main output port, could you please tell us the time between a dir error detection and an error flag output?
Best Regards,
Kato
Hi Dominik-san,
Thank you for your quick reply.
The dir error detection procedure which I understood is shown as below.
The error output which occurs when the pll is unlocked is updated based on each frame(1/fs) of the S/PDIF source.
If this error flag output is triggered using the oscilloscope, since an error is detected immediately(~100ns), the problem frame is a frame just before that, therefore I can confirm what is wrong.
Could you please give me your advice if I have any misunderstanding?
Best Regards,
Kato
Kato-san,
The error flag indicates a problem with the previous frame, correct.
Best Regards,
Dominik.
Hi Dominik-san,
Thank you for confirming the procedure of the dir error detection.
I understood and will contact you again if I have any questions.
Best Regards,
Kato
Hi Dominik-san,
Could you please confirm just in case as below?
If the biphase error, the frame length error or the preamble error is only detected once, is the clock data recovery unlocked?
Best Regards,
Kato
Hi Dominik-san,
The additional question which I requested became clear as the following post.
Thank you very much.
http://e2e.ti.com/support/data_converters/audio_converters/f/64/p/349520/1223994.aspx#1223994
Best Regards,
Kato