Issues with Input Board USB-3, TAS5538 and TAS5624ADDVEVM

Would I be wise to chop off the TAS5538 and rework with a 5558 or 5548?

Hi Brent,

I apologize for the troubles. Yes it would better to replace TAS5538 with TAS5558. Since TAS5558 has thermal pad down, you would want to make sure it does not short with other traces on the PCB. You may apply kaptone tape on the TAS5558 thermal pad to provide electrical insulation.

Sample TAS5538 Startup I2C -

X00 6D

X12 C0

X30 01

X31 23

X32 45

X33 67

X0F 00

X03 20

X27 00

X16 02

X04 10

XD9 00 00 00 48

reg,

Paul.

Thanks Paul! 

In my final application I am not going to have a mclk. It's one of my design constraints. If I use the tas5548 which requires a 12.8mhz oscillator, will the device accept 44.1khz i2s with sclk 2.8mhz, lrclk 44.1k and data lines only? 

There will be a couple of sources and none will be synchronous but only one is required to play at a time. 

I've ordered my samples and will post when rework is done. 

Thanks in advance. 

Hi, Brent,

You should be able to tie MCLK to SCLK at 64Fs.

reg,

Paul.

Paul, 

Do you mean I can use sclk as mclk = 2.8mhz? This would work on either tad5558 or tas5548 right?

Is there any advantage to 5558? Over 5548? Latter is cheaper I believe but at what cost to performance and function? 

After a long hiatus for other projects I've grabbed the TAS5624 EVM off the back burner and replaced the TAS5538 with a shiny new TAS5558. I have the same problem... :-(

Still confused as to the root cause. I observe:

- tried a variety of input formats, all I2S, including 11.28MHz MCLK, 2.82MHz SCLK, 88.2kHz LRCLK, 

- VALID pin is driven low, which is holding the TAS5624 in reset

- I'm seeing intermittant I2C problems. The TAS5558 is inconsistent in ACK'ing my I2C requests, and often I'll get NACKS and 0xFF responses. I've found that I have to loop requests until I get a good readback. I2C tested at 10KHz, 50Khz and 100KHz with no difference.

- Im using the start up init sequence shown above in this thread with X00 0x84, X0E 0x03.

- I drive reset_n low for 100ms before initialisation. 

- I have no other faults/errors - the Error Status Reg 0x02 reads 0x00.

Here's a dump of my initialisation debug output. The '.' is a cycle, you can see where the I2C write/readback fails by the number of periods. 

Waiting for TAS5558 ready, read Silicon ID (should be 0x4)
........................................................................................................Addr 0x1 = 4
Write device 0x1b, reg 0x12 <- 0xc0. . :-)
Write device 0x1b, reg 0x0 <- 0x84. .. :-)
Write device 0x1b, reg 0x30 <- 0x1. ...................................................................................................................................................................................... :-)
Write device 0x1b, reg 0x31 <- 0x23. . :-)
Write device 0x1b, reg 0x32 <- 0x45. . :-)
Write device 0x1b, reg 0x33 <- 0x67. . :-)
Write device 0x1b, reg 0xf <- 0x0. . :-)
Write device 0x1b, reg 0x3 <- 0x20. . :-)
Write device 0x1b, reg 0x27 <- 0x0. . :-)
Write device 0x1b, reg 0x16 <- 0x2. . :-)
Write device 0x1b, reg 0x4 <- 0x10. . :-)
Clock Control Reg 0x0 = 0x6c
General Status Reg 0x1 = 0x4
Error Status Reg 0x2 = 0x0
Data Interface Reg 0xe = 0x55
Soft Mute Reg 0xf = 0x0
ASRC Status Reg 0xc3 = 0x0
ASRC Status Reg 0xc3 = 0xffffff
ASRC Status Reg 0xc4 = 0x0
ASRC Control Reg 0xc4 = 0xffffff
ASRC Status Reg 0xc5 = 0x0
ASRC Mode Control Reg 0xc5 = 0xffffff

I'm not sure what else to try. 

PIcture of the waveform as seen by SignalTap/FPGA attached:

This setting is 88.2khz, 5.64MHz bclk/mclk. I've also tried the same with 11.28Mhz MCLK. 

Any ideas? 

Is PurePath GUI Console the current software? from http://cc.ext.ti.com/ 

Hi Tuan,

Turned out my issues was 1) Power related, 2) A bad solder/dry joint in an awkward place, 3) just sh*t luck. A dry joint can ruin your day. 

The board configures and works fine with the InputUSBBoard3. I've moved to my own hardware now, and I'm trying to get this I2S configuration working:

MCLK - 2.82MHz

SCLK - 2.82MHz 

LRCLK - 44.1kHz

so 64xFs configuration. Will this i2c config work:

X00 40 // 44.1khz 64mclk 010 000 00

X12 C0 // Trim register, select internal factory trim

X30 01 // Input mux ch1 and 2

X31 23 // INput mux ch 3 and 4

X32 45 // Input mux ch 5 and 6

X33 67 // INput mux ch 7 and 8

X0F 00 // Soft mute reg

X03 20 // Exit shutdown

X27 00 // individual ch shutdown

X16 02 // Modulation limit reg

X04 10 // system control register

XD9 00 00 00 48 // Bring the noise

Am I right that 0x00 is the important register here? I've got a logic analyser telling me my I2S is compliant, and happy. The system works fine with 44.1kHz 11.288MHz 2.822MHz. Could you just double check my registers? 

Thanks. 

Hi Brent,

I'm glad you got your board debugged.  Reg 00H is telling you if I2S clocks are all good (auto detection).  Your register settings look correct.

Thanks,

Tuan