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TLV320AIC3204 Frequency Response at 192kHz Processing for ADC

Other Parts Discussed in Thread: TLV320AIC3204

Hi,

Could you please send us the graph of the frequency response at 192kHz Processing for ADC if you have it ?
The evaluation conditions which we would like to obtain are mentioned "2.5.2.14 ADC, Stereo, 192kHz, Lowest Power Consumption(CM=0.9V, AVDD=1.8V)" on page 60 of TLV320AIC3204 application reference guide.
In addition, could you please tell us the gain@40kHz when setting the gain of the analog programable gain amplifier to 0dB and +47.5dB ?

Best Regards,
Kato

  • Hi, Kato-san,

    I've asked my colleague to comment.

    -d2

  • Hi Don-san,

    Thank you for your quick reply.
    I am looking forward to hearing from you.

    Best Regards,
    Kato

  • Kato-san,

    The graph for decimation filter C is found on page 30 of the application reference guide. By looking at the graph, for 40kHz (about 0.2*FS), the attuenation is about 10dB. The high frequency response will remain the same as long as the signal does not exceed 0dBFS.

    You can extend the response to one similar to Filter B by using the trick below . By the way, the zip file in that post also has a frequency response plot.

    https://e2e.ti.com/support/data_converters/audio_converters/int-audio_converters/f/66/t/85490.aspx

    Below is a script using Filter B for your reference:

    4745.AIC32x4_192_KHZ.cfg

    Regards,

    J-

  • Hi J-san,

    Thank you for your response.
    I will inform our customer of this information.
    Unfortunately, I can not access in the above post.

    Best Regards,
    Kato

  • Hi Kato-san,

    I apologize. Below is the post:

    "It is possible to have a wider bandwidth on ADC side using filter B @ 192ksps. See attached zip file for instructions. This requires using the AIC3254, which has an embedded miniDSP. Note that 4x2x is the equivalent filter of Filter B for both ADC and DAC channels.

    When using filter B with OSR = 32, there is a gain error of ~-24dB.

    The AIC3204 can be used as well, however, the maximum gain that can be applied in digital is 20dB, which leads to a gain error of -4dB. If using 24-bit data stream through I2S, the ADC noise dominates, so it can be shifted in the host processor. However, if using 16-bit I2S, this would lead to 4dB loss. One way to compensate is to set the N1 coefficient of any biquad to "0x656EE3" (i.e. 4dB), while setting N0, N2, D1 and D2 to 0x000000 and setting ADC gain to 20dB. The performance should be similar to the one seen on the attached FFT and frequency response plots."

    2728.AIC3254_4x2x_192ksps_Setup.zip

    J-

  • Hi J-san,

    Thank you for your quick response.
    I understood.
    Since our customer needs the wide programmable gain range as the target application, he will use the default settings at 192kHz processing.

    Best Regards,
    Kato