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CC8520 latency

Other Parts Discussed in Thread: CC8520

Greetings E2@.

Please advise on the following questions.

- We are only using one channel.  It seems that I can select 5Mbps signaling and Protocol B in this situation.  Will that provide enough robustness that we will get good results with the minimum buffer size (640 samples)?  That would provide acceptable latency.  If not, what buffer size do we realistically need for good robustness?

- It seems like the CC8520 chipset may be somewhat "soft" (firmware driven), and that the Configurator may load the firmware into the chip.  If that is the case, is there any possibility of getting a "special" firmware version that would improve the latency for our particular application: PCME24, single channel, single slave?

On another track, can you tell me if TI might have any new products on the horizon that would be a better fit for our application?  In addition to lower latency (< 10 ms desired), we would prefer a larger number of independent "networks" to be possible--at least 6 to 10.  Also bit-accurate 20 or 24 bits would be preferred.


regards

Madhuri

  • Hi Madhuri, 

    - We are only using one channel.  It seems that I can select 5Mbps signaling and Protocol B in this situation.  Will that provide enough robustness that we will get good results with the minimum buffer size (640 samples)?  That would provide acceptable latency.  If not, what buffer size do we realistically need for good robustness?

    What is good enough robustness is more for you to decide than for us to speculate on. It will vary from application to application and environment to environment. Although we do have customers using the minimum buffer size in commercial applications, the tendency is towards a few notch higher setting. 


    - It seems like the CC8520 chipset may be somewhat "soft" (firmware driven), and that the Configurator may load the firmware into the chip.  If that is the case, is there any possibility of getting a "special" firmware version that would improve the latency for our particular application: PCME24, single channel, single slave?


    You are correct that it is firmware driven, but we do not do custom FW and the buffer size limitations in place is there because the quality below this is unacceptable for any application. It might be that in your case we would have written everything differently from scratch, but since we are serving a general purpose market we need to make compromises.


    On another track, can you tell me if TI might have any new products on the horizon that would be a better fit for our application?  In addition to lower latency (< 10 ms desired), we would prefer a larger number of independent "networks" to be possible--at least 6 to 10.  Also bit-accurate 20 or 24 bits would be preferred.


    Can't say from the entire TI portfolio, but from a PurePath Wireless perspective we do not have any plans for a low latency version beyond our current offering.

    Best regards, 

    Kjetil

  • Thank you for your answers.

    Is it possible to get the source code and development environment for the chipset so that my customer could make modifications themselves?

    thanks,

    Madhuri