AM3352 TLV320DAC3120 interface

Mateusz Gwara

Other Parts Discussed in Thread: TLV320DAC3120, AM3352

In our custom made board prototype, we are using the am3352 CPU and the TLV320DAC3120 connected as shown below:

CPU-PIN	used mode	Offset/GPIO#	Pin@TLV320DAC3120	description
A14	0x00 /* mcasp0_ahclkx, OUTPUT \| MODE0 */	0x1AC	MCLK	master clock HF
A13	0x00 /* mcasp0_aclkx, OUTPUT \| MODE0 */	0x190	BCLK	bit clock
B13	0x00 /* mcasp0_fsx, OUTPUT \| MODE0 */	0x194	WCLK	Word clock
C12	0x02 /* mcasp0_axr2, OUTPUT \| MODE2 */	0x19c	DIN
V17	GPIO out	GPIO59	Output Enable 0	external switch
V16	GPIO out	GPIO56	RESET 0	Audio Reset

the relevant device tree parts look like this:

&mcasp0 {
pinctrl-names = "default";
pinctrl-0 = <&mcasp0_pins>;

status = "okay";

op-mode = <0>; /* MCASP_IIS_MODE */
tdm-slots = <2>;
num-serializer = <4>;
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
1 0 0 0
>;
tx-num-evt = <1>;
rx-num-evt = <1>;
};

mcasp0_pins: mcasp0_pins {
pinctrl-single,pins = <
0x1ac 0x00
0x194 0x00
0x190 0x00
0x19c 0x02
>;
};

sound {
compatible = "ti,da830-evm-audio";
ti,model = "DA830 EVM";
ti,audio-codec = <&tlv320aic3x>;
ti,mcasp-controller = <&mcasp0>;
ti,codec-clock-rate = <12000000>;
ti,audio-routing =
"Headphone Jack", "HPLOUT",
"Headphone Jack", "HPROUT",
"LINE1L", "Line In",
"LINE1R", "Line In";
};

tlv320aic3x: tlv320aic3x@18 {
compatible = "ti,tlv320aic3x";
reg = <0x18>;
status = "okay";
};

havin the CPU-Pins connected like this, my only option seems to be to use mcasp0_axr2 on cpu pin c12 as data out and the clock signals to be all generated on the cpu and fed into the DAC (as described on page 4300 http://www.ti.com/lit/ug/spruh73j/spruh73j.pdf).

See also figure 2 in http://www.ti.com/lit/an/slaa469/slaa469.pdf

Could you point me into the right direction regarding the correct choice of drivers and codecs (currently working in linux stable kernel 3.15.4)?

/sound/soc/codecs/tlv320aic31xx.c looks like it has all the register settings correctly in place although it is meant for a slightly different IC.

aplay -v -v -L returns:



default
Playback/recording through the PulseAudio sound server
sysdefault:CARD=EVM
DA830 EVM,
Default Audio Device

but mplayer hust hangs at this screen:

==========================================================================
Opening audio decoder: [pcm] Uncompressed PCM audio decoder
AUDIO: 44100 Hz, 1 ch, s16le, 705.6 kbit/100.00% (ratio: 88200->88200)
Selected audio codec: [pcm] afm: pcm (Uncompressed PCM)
==========================================================================
AO: [pulse] 44100Hz 1ch s16le (2 bytes per sample)
Video: no video
Starting playback...
A: 0.0 (00.0) of 1.5 (01.5) ??,?% $<50>

Do i need to change something in order to get the correct wclk/bclk values or shoud the driver handle this?

I do not understand the

ti,codec-clock-rate = <12000000>;

op-mode = <0>; /* MCASP_IIS_MODE */
tdm-slots = <2>;
num-serializer = <4>;
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
1 0 0 0
>;
tx-num-evt = <1>;
rx-num-evt = <1>;

parts of the device tree, which i tried to rewrite from the BeagleBoneBlack Audio cape device tree.

over 12 years ago

0 Don Dapkus over 12 years ago

TI__Guru**** 189401 points

Hi,

You can find info on our drivers at this post. Unfortunately, we are not able to provide detailed support beyond that.

-d2

0 Mateusz Gwara over 12 years ago

Prodigy 140 points

I am initialising this setup by:

echo 56 > /sys/class/gpio/export
echo "out" > /sys/class/gpio/gpio56/direction
echo 0 > /sys/class/gpio/gpio56/value
sleep 1
echo 1 > /sys/class/gpio/gpio56/value
echo 59 > /sys/class/gpio/export
echo "out" > /sys/class/gpio/gpio59/direction
echo 1 > /sys/class/gpio/gpio59/value

Which gives me acces to the I2C-Interface of the TLV320DAC3120

I have rewritten the DAC3120_USB_Init. sequence from the codec control software to use linux i2ctools command line syntax:

###############################################
# Software Reset
###############################################
#
# Select Page 0
i2cset -f -y 0 0x18 0x00 0x00
#
# Initialize the device through software reset
i2cset -f -y 0 0x18 0x01 0x01
#
###############################################

###############################################
# Clock and Interface Settings
# ---------------------------------------------
# The codec receives: MCLK = 11.2896 MHz,
# BLCK = 2.8224 MHz, WCLK = 44.1 kHz
###############################################
#
# Select Page 0
i2cset -f -y 0 0x18 0x00 0x00
#
# PLL_clkin = MCLK, codec_clkin = PLL_CLK,
# PLL on, P=1, R=1, J=8, D=0000
i2cset -f -y 0 0x18 0x04 0x03
i2cset -f -y 0 0x18 0x05 0x91
i2cset -f -y 0 0x18 0x06 0x08
i2cset -f -y 0 0x18 0x07 0x00
i2cset -f -y 0 0x18 0x08 0x00
#
# NDAC = 2, MDAC = 8, dividers powered on
i2cset -f -y 0 0x18 0x1b 0x82
i2cset -f -y 0 0x18 0x0c 0x88
#
# DOSR = 128
i2cset -f -y 0 0x18 0x0d 0x00
i2cset -f -y 0 0x18 0x0e 0x80
#
# NADC = 2, MADC = 8, dividers powered on
i2cset -f -y 0 0x18 0x12 0x82
i2cset -f -y 0 0x18 0x12 0x88
#
# AOSR = 128
i2cset -f -y 0 0x18 0x14 0x80
#
###############################################

###############################################
# Signal Processing Settings
###############################################
#
# Select Page 0
i2cset -f -y 0 0x18 0x00 0x00
#
# PRB_P5, PRB_R5
i2cset -f -y 0 0x18 0x3c 0x05
i2cset -f -y 0 0x18 0x3d 0x05
#
# Enable Adaptive Filtering
i2cset -f -y 0 0x18 0x00 0x08
i2cset -f -y 0 0x18 0x01 0x04
#
###############################################

##########################################
# Configure Class-D Output
##########################################
#
# Switch to Page 1
i2cset -f -y 0 0x18 0x00 0x01
#
# CM = 1.65V
i2cset -f -y 0 0x18 0x1f 0x14
#
# Unmute Class-D (6dB)
i2cset -f -y 0 0x18 0x2a 0x04
# Unmute Class-D (12dB)
# w 30 2a 0c
# Unmute Class-D (18dB)
# w 30 2a 14
# Unmute Class-D (24dB)
# w 30 2a 1c
#
# Power-up Class-D driver
i2cset -f -y 0 0x18 0x20 0x86


#
# Route Analog Volume Control to Class-D Driver, 0dB
i2cset -f -y 0 0x18 0x26 0x80
#
##########################################

##########################################
# Configure HP Output
##########################################
#
# Switch to Page 1
i2cset -f -y 0 0x18 0x00 0x01
#
# De-pop, Power on = 800 ms, Step time = 4 ms
i2cset -f -y 0 0x18 0x21 0x4e
#
# Route Analog Volume Control to HP Driver, 0dB
i2cset -f -y 0 0x18 0x24 0x80
#
# HP output powered up, current limit
i2cset -f -y 0 0x18 0x1f 0x84
#
# HP unmute and gain 0db
i2cset -f -y 0 0x18 0x28 0x06
#
##########################################

##########################################
# Configure DAC Channel
##########################################
#
# Switch to Page 1
i2cset -f -y 0 0x18 0x00 0x01
#
# DAC routed to Mixer Amplifier
i2cset -f -y 0 0x18 0x23 0x40
#
# Switch to Page 0
i2cset -f -y 0 0x18 0x00 0x00
#
# Powerup DAC, DAC => LI2S, soft-step disable
i2cset -f -y 0 0x18 0x3f 0x96
#
# Unmute DAC, 0dB
i2cset -f -y 0 0x18 0x40 0x04
i2cset -f -y 0 0x18 0x41 0x00
#
########################################## --------------------------------------------------------------- page 0 is selected

Shoudn't I be able to hear the example beep from the manual right now?

i2cset -f -y 0 0x18 0x47 0x80
i2cset -f -y 0 0x18 0x48 0x80
i2cset -f -y 0 0x18 0x49 0x00
i2cset -f -y 0 0x18 0x4a 0x00
i2cset -f -y 0 0x18 0x4b 0xee
i2cset -f -y 0 0x18 0x4c 0x10
i2cset -f -y 0 0x18 0x4d 0xd8
i2cset -f -y 0 0x18 0x4e 0x7e
i2cset -f -y 0 0x18 0x4f 0xe3

because i don't... :/

0 Mateusz Gwara over 12 years ago in reply to Don Dapkus

Prodigy 140 points

Unfortunately the mentioned thread(I already checked out) contains drivers older than the current kernel images as well as lacking an exact match for the TLV320DAC3120 which seems to be my problem considering the forementioned setup i use.

The kernel loading succesfully the driver i mentioned for the device seems to be the first step. It seems to be the way the driver handles teh DAC (namely like a AIC).

0 Mateusz Gwara over 12 years ago in reply to Mateusz Gwara

Prodigy 140 points

one thing i noticed after writing:

i2cset -f -y 0 0x18 0x47 0x80
i2cset -f -y 0 0x18 0x48 0x80
i2cset -f -y 0 0x18 0x49 0x00
i2cset -f -y 0 0x18 0x4a 0x00
i2cset -f -y 0 0x18 0x4b 0xee
i2cset -f -y 0 0x18 0x4c 0x10
i2cset -f -y 0 0x18 0x4d 0xd8
i2cset -f -y 0 0x18 0x4e 0x7e
i2cset -f -y 0 0x18 0x4f 0xe3

to the TLV320DAC3120 I2C bus:

After I power down my board the buzzer goes off?

Any ideas?

0 Mateusz Gwara over 12 years ago in reply to Mateusz Gwara

Prodigy 140 points

After reviewing the driver
/sound/soc/codecs/tlv320aic31xx.c
I think found the link between the rate setting of 12000000 in the device tree and the way the driver controls the IC:

static const struct aic31xx_rate_divs aic31xx_divs[] = {
/* mclk rate pll: p j d dosr ndac mdac aors nadc madc */
/* 8k rate */
{12000000, 8000, 1, 8, 1920, 128, 48, 2, 128, 48, 2},

Can anybody confirm that I can use this driver with the TLV320DAC3120 which to be precise isn't a CODEC, just a DEC...

As I mentioned before, I'm not sure if the device tree provided the connection between CPU and TLV320DAC3120 is correct in the first place, so I would apprecieate help there too...

addendum:

The problem i see, having all the pins just usable as output(see mention of figure 2 in initial post):

The driver sets the clock dividers on the DAC, but the dac should get the correct clocks from the host CPU. How?

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AM3352 TLV320DAC3120 interface