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TLV320AIC3204 differential input

Soren Larsen
Prodigy 70 points

I am moving a design with a AIC3204 from single ended to differential input and used the configuration recommended in the data sheet, i.e. routing the positive and negative input to the amplifier via a 10kohm resistor. The inputs are capacitively coupled (as in figure 5-1 in the datasheet) but I can measure that I have no DC bias at the input pins (it gets the bias from the DC leakage in my coupling capacitors – which are ”unstable” and gives problems).

Shall I also use common mode on the input amplifers, i.e. change page 1 register 54 (left MICPGA negative terminal) from 0x10 (IN2R with 10kohm) to 0xD0 (IN2R with 10kohm and CM with 40kohm)?

Or shall I use page 1 register 58 and weakly connect all inputs to common mode?

BR

Søren 

 

  • 0
    TI__Mastermind 46195 points

    Hi Søren,

    The input pins are self-biased when connected to an internal feedforward resistance, once the input section is powered up properly. The weak connection keeps the pins biased to keep the capacitors charged when the input section is powered down, but consumes extra power.

    In differential mode there is no need to connect common mode to inverting input. 10k can be connected between positive input pin and P and 10k between negative input pin and M. See code snippet below as an example: 

    # Route IN3L to LEFT_P with 10K input impedance
    w 30 34 04
    #
    # Route IN3R to LEFT_M with 10K input impedance
    w 30 36 04

    The best place to get started is section 3 of http://focus.ti.com/lit/an/slaa404b/slaa404b.pdf. Appendix D2 shows use of the differential inputs.

    Regards,

    J-

     

     

     

  • 0 in reply to J-
    Prodigy 70 points

    Hi J-

    What you describe and section D.2 is what I am doing, but I can measure the bias to be very week.

    It so weak it cannot charge my external capcitor (220nF 0402’s). This means the DC impedance several Mohms (the DC also changes when I touch the inputs with a finger – which indicates the bias is very weak).

    What is DC impedance (just a rough indication) in differential mode?

    My setup is 10kohm on all inputs given the above described behavior:

    Page 1 register 0x34 = 0x10

    Page 1 register 0x36 = 0x10

    Page 1 register 0x37 = 0x40

    Page 1 register 0x39 = 0x10

     

    I tried this setup which is 10kohm on all inputs and 40kohm CM on the negative inputs:

    Page 1 register 0x34 = 0xD034

    Page 1 register 0x36 = 0x1036

    Page 1 register 0x37 = 0x4037

    Page 1 register 0x39 = 0xD039

    This gives a “brick wall” stable bias!!!

    I really thing the “self bias” is _very_ weak.

    Regards

    Søren

     

     

     

  • 0 in reply to Soren Larsen
    TI__Mastermind 46195 points

    Søren,

    Just after performing a software reset, try the following code (if not using LDO). The important thing is to execute the lines in blue color.

    To save power, the bias circuit will be activated for IN2 as soon as the ADC is powered, or the analog bypass path is enabled (MAL/MAR power).

    ###############################################
    # Initialize Codec
    ###############################################
    #
    # Select Page 1
    w 30 00 01
    #
    # Disable weak AVDD in presence of external
    # AVDD supply
    w 30 01 08
    #
    # Enable Master Analog Power Control
    w 30 02 00
    #
    # Select ADC PTM_R4
    w 30 3d 00
    #
    # Set the input powerup time to 3.1ms (for ADC)
    w 30 47 32
    #
    # Set the REF charging time to 40ms
    w 30 7b 01
    #
    ###############################################

    Regards,

    J-

  • 0 in reply to J-
    Prodigy 70 points

    Hi J-,

    I am back working on this issue as we got bad common mode rejection with my hack using CM to get bias. I has tried your "power up time" and "ref charging" – it did not solve the problem. Note we are using a sleep function where we powers down AVDD and the ADC’s. I am programming you suggested "power up time" and "ref charging" after we turns on AVDD and the ADC’s. What I can measure is after power up the bias of the analog inputs (IN1_L, IN1_R, IN2_L, IN2_R) are 0V. If I weak pulls them up (a touch we a finger is enough) I can see the 0.9V bias. The bias is _very_ high impedance – again a finger to ground can pull it down ~100mV. What is the expected DC impedance of the bias? Any other ideas to solve this?

     

    We have tried another work around to short the external AC coupling (220nF’s) to use the DC bias from the source which is 750mV. We get good common mode rejection (our hum disappears). Is there any problems in using the differential inputs DC coupled this way?

  • 0 in reply to Soren Larsen
    TI__Mastermind 46195 points

    Soren,

    AVDD and reference must be powered in order to keep pin at common mode. The reference can be forced to be powered up by writing Page 1 / Register 123.

    Regards,

    J-

  • 0 in reply to J-
    Prodigy 70 points

    J-

    Shall the force ref power be used when coming out of sleep (AVDD power up). I thought the ref follows AVVD power (I can measure the the REF voltage is OK). I will try the force option tomorrow.

    BR

    Søren

     

  • 0 in reply to Soren Larsen
    TI__Mastermind 46195 points

    Soren,

    The reference uses AVDD supply, so it should only be forced in "Standby mode". Forcing the reference ensures that it is powered, regardless if all other blocks are powered down.

    Regards,

    J-

  • 0 in reply to J-
    Prodigy 70 points

    Hi J-,

     

    I tried setting page 1, register 123 to 5 (force REF). Still no bias at the 4 inputs.

  • 0 in reply to Soren Larsen
    TI__Mastermind 46195 points

    Soren,

    Here's an example script that can be executed with EVM:


    # Standby/Sleep Mode

    # Weak CM connection to IN2L/IN2R (slow charge)
    w 30 00 01
    w 30 3A 30

    b "Press continue to wake-up"
    # Wake up from Stand-by/Sleep Mode

    # Disable weak DVDD to AVDD connection
    w 30 00 01
    w 30 01 08
    # Power Analog Blocks
    w 30 00 01
    w 30 02 00
    # Force REF, 40ms
    w 30 00 01
    w 30 7B 05
    # Input power-up time 6.4ms (for fast power-up)
    w 30 00 01
    w 30 47 32
    # IN2L to LMICPGA_P
    w 30 00 01
    w 30 34 20
    # IN2R to RMICPGA_M
    w 30 00 01
    w 30 36 20

    # Powerup LADC/RADC
    w 30 00 00
    w 30 51 C0

    # Shut down LADC/RADC if needed